Gweltaz Gaudin

Person

Grenoble, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method for producing a composite structure comprising a thin monocr...
- Patent number 12,087,631
- Issue date Sep 10, 2024
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a donor substrate for creating a three-dimensi...
- Patent number 11,239,108
- Issue date Feb 1, 2022
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid structure for a surface acoustic wave device
- Patent number 11,159,140
- Issue date Oct 26, 2021
- Soitec
- Gweltaz Gaudin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for manufacturing a semiconductor structure
- Patent number 11,156,778
- Issue date Oct 26, 2021
- Soitec
- Bich-Yen Nguyen
- G02 - OPTICS
Information Patent Grant
Method for producing composite structure with metal/metal bonding
- Patent number 9,905,531
- Issue date Feb 27, 2018
- Soitec
- Ionut Radu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for molecular adhesion bonding with compensation for radi...
- Patent number 9,818,614
- Issue date Nov 14, 2017
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a layer comprising a compressive stress lay...
- Patent number 9,548,237
- Issue date Jan 17, 2017
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a heterostructure limiting the formation of...
- Patent number 9,330,958
- Issue date May 3, 2016
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular adhesion bonding with compensation for radial...
- Patent number 9,123,631
- Issue date Sep 1, 2015
- Soitec
- Gweltaz Gaudin
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
3D integrated heterostructures having low-temperature bonded interf...
- Patent number 9,117,686
- Issue date Aug 25, 2015
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Process for bonding two substrates
- Patent number 8,999,090
- Issue date Apr 7, 2015
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-temperature bonding process
- Patent number 8,790,992
- Issue date Jul 29, 2014
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Substrate having a charged zone in an insulating buried layer
- Patent number 8,735,946
- Issue date May 27, 2014
- Soitec
- Mohamad A Shaheen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a monocrystalline semiconductor layer onto...
- Patent number 8,603,896
- Issue date Dec 10, 2013
- Soitec
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Direct bonding method with reduction in overlay misalignment
- Patent number 8,575,002
- Issue date Nov 5, 2013
- Soitec
- Marcel Broekaart
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Substrate having a charged zone in an insulating buried layer
- Patent number 8,535,996
- Issue date Sep 17, 2013
- Soitec
- Mohamad Shaheen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular adhesion bonding with compensation for radial...
- Patent number 8,475,612
- Issue date Jul 2, 2013
- Soitec
- Gweltaz Gaudin
- B32 - LAYERED PRODUCTS
Information Patent Grant
Surface treatment for molecular bonding
- Patent number 8,202,785
- Issue date Jun 19, 2012
- Soitec
- Arnaud Castex
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR TRANSFERRING A MONOCRYSTALLINE SIC LAYER ONTO A POLYCRYS...
- Publication number 20240392476
- Publication date Nov 28, 2024
- SOITEC
- Ionut Radu
- C30 - CRYSTAL GROWTH
Information Patent Application
COMPOSITE STRUCTURE COMPRISING A USEFUL MONOCRYSTALLINE SIC LAYER O...
- Publication number 20240395603
- Publication date Nov 28, 2024
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING A USEFUL...
- Publication number 20240312831
- Publication date Sep 19, 2024
- SOITEC
- Alexis Drouin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE COMPRISING AN ELECTRICALLY CONDUCTIVE BONDI...
- Publication number 20240266172
- Publication date Aug 8, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Frédéric Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SILICON CARBIDE-BASED SEMICONDUCTOR STRUCTUR...
- Publication number 20240170284
- Publication date May 23, 2024
- SOITEC
- Gweltaz Gaudin
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD FOR MANUFACTURING A SILICON-CARBIDE-BASED SEMICONDUCTOR STRU...
- Publication number 20240145294
- Publication date May 2, 2024
- SOITEC
- Hugo Biard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DONOR SUBSTRATE FOR THE TRANSFER OF A THIN LAYER AND ASSOCIATED TRA...
- Publication number 20240030061
- Publication date Jan 25, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Larry Vincent
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING AN INTERF...
- Publication number 20240030033
- Publication date Jan 25, 2024
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DETACHABLE TEMPORARY SUBSTRATE COMPATIBLE WITH VERY HIGH TEMPERATUR...
- Publication number 20230230868
- Publication date Jul 20, 2023
- SOITEC
- Hugo Biard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE
- Publication number 20230129131
- Publication date Apr 27, 2023
- SOITEC
- Bich-Yen Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF JOINING TWO SEMI-CONDUCTOR SUBSTRATES
- Publication number 20230040826
- Publication date Feb 9, 2023
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCR...
- Publication number 20220359293
- Publication date Nov 10, 2022
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR SEALING CAVITIES USING MEMBRANES
- Publication number 20220298007
- Publication date Sep 22, 2022
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Thierry SALVETAT
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD FOR PRODUCING A DONOR SUBSTRATE FOR CREATING A THREE-DIMENSI...
- Publication number 20210057268
- Publication date Feb 25, 2021
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID STRUCTURE FOR A SURFACE ACOUSTIC WAVE DEVICE
- Publication number 20200336127
- Publication date Oct 22, 2020
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID STRUCTURE FOR A SURFACE ACOUSTIC WAVE DEVICE
- Publication number 20190372552
- Publication date Dec 5, 2019
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE
- Publication number 20190187376
- Publication date Jun 20, 2019
- SOITEC
- Bich-Yen Nguyen
- G02 - OPTICS
Information Patent Application
METHOD FOR TRASFERRING A LAYER
- Publication number 20150364364
- Publication date Dec 17, 2015
- SOITEC
- Gweltaz Gaudin
- B32 - LAYERED PRODUCTS
Information Patent Application
METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL...
- Publication number 20150348933
- Publication date Dec 3, 2015
- SOITEC
- Gweltaz Gaudin
- B32 - LAYERED PRODUCTS
Information Patent Application
METHOD FOR PRODUCING COMPOSITE STRUCTURE WITH METAL/METAL BONDING
- Publication number 20150179603
- Publication date Jun 25, 2015
- SOITEC
- Ionut Radu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR FABRICATING A HETEROSTRUCTURE LIMITING THE FORMATION OF...
- Publication number 20150132923
- Publication date May 14, 2015
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...
- Publication number 20140327113
- Publication date Nov 6, 2014
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
- Publication number 20140225182
- Publication date Aug 14, 2014
- SOITEC
- Mohamad A. Shaheen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
- Publication number 20140015023
- Publication date Jan 16, 2014
- SOITEC
- Frederic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL...
- Publication number 20130210171
- Publication date Aug 15, 2013
- SOITEC
- Gweltaz Gaudin
- B32 - LAYERED PRODUCTS
Information Patent Application
PROCESS FOR BONDING TWO SUBSTRATES
- Publication number 20130139946
- Publication date Jun 6, 2013
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TRANSFERRING A MONOCRYSTALLINE SEMICONDUCTOR LAYER ONTO...
- Publication number 20130029474
- Publication date Jan 31, 2013
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT BONDING METHOD WITH REDUCTION IN OVERLAY MISALIGNMENT
- Publication number 20120077329
- Publication date Mar 29, 2012
- Marcel Broekaart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-TEMPERATURE BONDING PROCESS
- Publication number 20120043647
- Publication date Feb 23, 2012
- Gweltaz M. Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Preparing a Surface of a Sapphire Substrate for Fabricating Heteros...
- Publication number 20120015497
- Publication date Jan 19, 2012
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS

Gweltaz Gaudin

Person

Patents Grantslast 30 patents

Method for producing a composite structure comprising a thin monocr...

Method for producing a donor substrate for creating a three-dimensi...

Hybrid structure for a surface acoustic wave device

Method for manufacturing a semiconductor structure

Method for producing composite structure with metal/metal bonding

Apparatus for molecular adhesion bonding with compensation for radi...

Method for transferring a layer comprising a compressive stress lay...

Process for fabricating a heterostructure limiting the formation of...

Method for molecular adhesion bonding with compensation for radial...

3D integrated heterostructures having low-temperature bonded interf...

Process for bonding two substrates

Low-temperature bonding process

Substrate having a charged zone in an insulating buried layer

Method for transferring a monocrystalline semiconductor layer onto...

Direct bonding method with reduction in overlay misalignment

Substrate having a charged zone in an insulating buried layer

Method for molecular adhesion bonding with compensation for radial...

Surface treatment for molecular bonding

Patents Applicationslast 30 patents

METHOD FOR TRANSFERRING A MONOCRYSTALLINE SIC LAYER ONTO A POLYCRYS...

COMPOSITE STRUCTURE COMPRISING A USEFUL MONOCRYSTALLINE SIC LAYER O...

METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING A USEFUL...

SEMICONDUCTOR STRUCTURE COMPRISING AN ELECTRICALLY CONDUCTIVE BONDI...

METHOD FOR PRODUCING A SILICON CARBIDE-BASED SEMICONDUCTOR STRUCTUR...

METHOD FOR MANUFACTURING A SILICON-CARBIDE-BASED SEMICONDUCTOR STRU...

DONOR SUBSTRATE FOR THE TRANSFER OF A THIN LAYER AND ASSOCIATED TRA...

METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING AN INTERF...

DETACHABLE TEMPORARY SUBSTRATE COMPATIBLE WITH VERY HIGH TEMPERATUR...

METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE

METHOD OF JOINING TWO SEMI-CONDUCTOR SUBSTRATES

METHOD FOR PRODUCING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCR...

METHOD FOR SEALING CAVITIES USING MEMBRANES

METHOD FOR PRODUCING A DONOR SUBSTRATE FOR CREATING A THREE-DIMENSI...

HYBRID STRUCTURE FOR A SURFACE ACOUSTIC WAVE DEVICE

HYBRID STRUCTURE FOR A SURFACE ACOUSTIC WAVE DEVICE

METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE

METHOD FOR TRASFERRING A LAYER

METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL...

METHOD FOR PRODUCING COMPOSITE STRUCTURE WITH METAL/METAL BONDING

PROCESS FOR FABRICATING A HETEROSTRUCTURE LIMITING THE FORMATION OF...

3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...

SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER

SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER

METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL...

PROCESS FOR BONDING TWO SUBSTRATES

METHOD FOR TRANSFERRING A MONOCRYSTALLINE SEMICONDUCTOR LAYER ONTO...

DIRECT BONDING METHOD WITH REDUCTION IN OVERLAY MISALIGNMENT

LOW-TEMPERATURE BONDING PROCESS

Preparing a Surface of a Sapphire Substrate for Fabricating Heteros...