Hagop Nazarian

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,100,449
- Issue date Sep 24, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,080,347
- Issue date Sep 3, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,967,376
- Issue date Apr 23, 2024
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory erase techniques and apparatus
- Patent number 11,790,999
- Issue date Oct 17, 2023
- Crossbar, Inc.
- Jeremy Guy
- G11 - INFORMATION STORAGE
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,450,384
- Issue date Sep 20, 2022
- Crossbar, Inc.
- Sung Hyun Jo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,437,100
- Issue date Sep 6, 2022
- Crossbar, Inc.
- Sung Hyun Jo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,430,517
- Issue date Aug 30, 2022
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,430,516
- Issue date Aug 30, 2022
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,423,984
- Issue date Aug 23, 2022
- Crossbar, Inc.
- Sung Hyun Jo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitance measurement and apparatus for resistive switching memor...
- Patent number 11,393,529
- Issue date Jul 19, 2022
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Network router device with hardware-implemented lookups including t...
- Patent number 11,270,769
- Issue date Mar 8, 2022
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resistive random-access memory and architecture with select and con...
- Patent number 11,227,654
- Issue date Jan 18, 2022
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing memory architecture
- Patent number 11,222,696
- Issue date Jan 11, 2022
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resistive random access memory matrix multiplication structures and...
- Patent number 11,127,460
- Issue date Sep 21, 2021
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resistive random access memory program and erase techniques and app...
- Patent number 10,998,064
- Issue date May 4, 2021
- Crossbar, Inc.
- Jeremy Guy
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for facilitated program and erase of two-term...
- Patent number 10,957,410
- Issue date Mar 23, 2021
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating an array of 4F2 resistive non-volatile memor...
- Patent number 10,847,579
- Issue date Nov 24, 2020
- Crossbar, Inc.
- Hagop Nazarian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
State change detection for two-terminal memory
- Patent number 10,796,751
- Issue date Oct 6, 2020
- Crossbar, Inc.
- Sang Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing memory architecture
- Patent number 10,699,785
- Issue date Jun 30, 2020
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory cell utilizing volatile switching two terminal...
- Patent number 10,658,033
- Issue date May 19, 2020
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Switching block configuration bit comprising a non-volatile memory...
- Patent number 10,541,025
- Issue date Jan 21, 2020
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Neuromorphic logic for an array of high on/off ratio non-volatile m...
- Patent number 10,489,700
- Issue date Nov 26, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read operation with data latch and signal termination for 1TNR memo...
- Patent number 10,475,511
- Issue date Nov 12, 2019
- Crossbar, Inc.
- Lin Shih Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
4F2 resistive non-volatile memory formed in a NAND architecture
- Patent number 10,453,896
- Issue date Oct 22, 2019
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic applications for an array of high on/off ratio a...
- Patent number 10,388,374
- Issue date Aug 20, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Node retainer circuit incorporating RRAM
- Patent number 10,347,335
- Issue date Jul 9, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell utilizing volatile switching two terminal...
- Patent number 10,210,929
- Issue date Feb 19, 2019
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
State change detection for two-terminal memory utilizing current mi...
- Patent number 10,199,093
- Issue date Feb 5, 2019
- Crossbar, Inc.
- Sang Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile resistive memory configuration cell for field programm...
- Patent number 10,199,105
- Issue date Feb 5, 2019
- Crossbar, Inc.
- Lin Shih Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Read operation with data latch and signal termination for 1TNR memo...
- Patent number 10,134,469
- Issue date Nov 20, 2018
- Crossbar, Inc.
- Lin Shih Liu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DIFFERENTIAL PROGRAMMING OF TWO-TERMINAL MEMORY WITH INTRINSIC ERRO...
- Publication number 20240071490
- Publication date Feb 29, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
MATRIX MULTIPLICATION WITH RESISTIVE MEMORY CIRCUIT HAVING GOOD SUB...
- Publication number 20230317161
- Publication date Oct 5, 2023
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL PROGRAMMING OF TWO-TERMINAL MEMORY WITH PROGRAM DETECT...
- Publication number 20230317162
- Publication date Oct 5, 2023
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20230005538
- Publication date Jan 5, 2023
- CROSSBAR, INC.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
CAPACITANCE MEASUREMENT AND APPARATUS FOR RESISTIVE SWITCHING MEMOR...
- Publication number 20220005527
- Publication date Jan 6, 2022
- Crossbar, Inc.
- Hagop Nazarian
- G01 - MEASURING TESTING
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20210312984
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20210312985
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY ERASE TECHNIQUES AND APPARATUS
- Publication number 20210312995
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Jeremy Guy
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20210312983
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20210312986
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20210314177
- Publication date Oct 7, 2021
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM-ACCESS MEMORY AND ARCHITECTURE WITH SELECT AND CON...
- Publication number 20210035636
- Publication date Feb 4, 2021
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CELL UTILIZING VOLATILE SWITCHING TWO TERMINAL...
- Publication number 20200051630
- Publication date Feb 13, 2020
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY PROGRAM AND ERASE TECHNIQUES AND APP...
- Publication number 20190272882
- Publication date Sep 5, 2019
- Crossbar, Inc.
- Jeremy Guy
- G11 - INFORMATION STORAGE
Information Patent Application
NETWORK ROUTER DEVICE WITH HARDWARE-IMPLEMENTED LOOKUPS INCLUDING T...
- Publication number 20190259452
- Publication date Aug 22, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING MEMORY ARCHITECTURE
- Publication number 20190103162
- Publication date Apr 4, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY MATRIX MULTIPLICATION STRUCTURES AND...
- Publication number 20190102358
- Publication date Apr 4, 2019
- Crossbar, Inc.
- Mehdi Asnaashari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SWITCHING BLOCK CONFIGURATION BIT COMPRISING A NON-VOLATILE MEMORY...
- Publication number 20190027219
- Publication date Jan 24, 2019
- Crossbar, Inc.
- Hagop Nazarian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NODE RETAINER CIRCUIT INCORPORATING RRAM
- Publication number 20180211704
- Publication date Jul 26, 2018
- Crossbar, Inc.
- Mehdi Asnaashari
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE RESISTIVE MEMORY CONFIGURATION CELL FOR FIELD PROGRAMM...
- Publication number 20170330622
- Publication date Nov 16, 2017
- Crossbar, Inc.
- Lin Shih Liu
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING A NON-VOLATILE MEMORY DEVICE UTILIZING SELECTOR DEVICE HOLD...
- Publication number 20170229169
- Publication date Aug 10, 2017
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH DENSITY SELECTOR-BASED NON VOLATILE MEMORY CELL AND FABRICATION
- Publication number 20160268341
- Publication date Sep 15, 2016
- Crossbar, Inc.
- Hagop Nazarian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NODE RETAINER CIRCUIT INCORPORATING RRAM
- Publication number 20160225442
- Publication date Aug 4, 2016
- Crossbar, Inc.
- Mehdi Asnaashari
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTOR-BASED NON-VOLATILE CELL FABRICATION UTILIZING IC-FOUNDRY C...
- Publication number 20160190208
- Publication date Jun 30, 2016
- Crossbar, Inc.
- Hagop Nazarian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY CELL UTILIZING VOLATILE SWITCHING TWO TERMINAL...
- Publication number 20160012886
- Publication date Jan 14, 2016
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING A NON-VOLATILE MEMORY DEVICE UTILIZING SELECTOR DEVICE HOLD...
- Publication number 20160005461
- Publication date Jan 7, 2016
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
NAND ARRAY COMPRISING PARALLEL TRANSISTOR AND TWO-TERMINAL SWITCHIN...
- Publication number 20150248931
- Publication date Sep 3, 2015
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY ARCHITECTURE WITH TWO-TERMINAL MEMORY CELLS
- Publication number 20150228334
- Publication date Aug 13, 2015
- Crossbar, Inc.
- Hagop NAZARIAN
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSION PROGRAMMABLE RESISTIVE RANDOM ACCESSED MEMORY ARRAY...
- Publication number 20150188051
- Publication date Jul 2, 2015
- Crossbar, Inc.
- Harry GEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CT-NOR DIFFERENTIAL BITLINE SENSING ARCHITECTURE
- Publication number 20150179656
- Publication date Jun 25, 2015
- SPANSION LLC
- Hagop Nazarian
- G11 - INFORMATION STORAGE

Hagop Nazarian

Person

Patents Grantslast 30 patents

Differential programming of two-terminal resistive switching memory...

Differential programming of two-terminal resistive switching memory...

Distinct chip identifier sequence utilizing unclonable characterist...

Resistive random access memory erase techniques and apparatus

Distinct chip identifier sequence utilizing unclonable characterist...

Distinct chip identifier sequence utilizing unclonable characterist...

Distinct chip identifier sequence utilizing unclonable characterist...

Distinct chip identifier sequence utilizing unclonable characterist...

Distinct chip identifier sequence utilizing unclonable characterist...

Capacitance measurement and apparatus for resistive switching memor...

Network router device with hardware-implemented lookups including t...

Resistive random-access memory and architecture with select and con...

Computing memory architecture

Resistive random access memory matrix multiplication structures and...

Resistive random access memory program and erase techniques and app...

Methods and apparatus for facilitated program and erase of two-term...

Method for fabricating an array of 4F2 resistive non-volatile memor...

State change detection for two-terminal memory

Computing memory architecture

Non-volatile memory cell utilizing volatile switching two terminal...

Switching block configuration bit comprising a non-volatile memory...

Neuromorphic logic for an array of high on/off ratio non-volatile m...

Read operation with data latch and signal termination for 1TNR memo...

4F2 resistive non-volatile memory formed in a NAND architecture

Programmable logic applications for an array of high on/off ratio a...

Node retainer circuit incorporating RRAM

Non-volatile memory cell utilizing volatile switching two terminal...

State change detection for two-terminal memory utilizing current mi...

Non-volatile resistive memory configuration cell for field programm...

Read operation with data latch and signal termination for 1TNR memo...

Patents Applicationslast 30 patents

DIFFERENTIAL PROGRAMMING OF TWO-TERMINAL MEMORY WITH INTRINSIC ERRO...

MATRIX MULTIPLICATION WITH RESISTIVE MEMORY CIRCUIT HAVING GOOD SUB...

DIFFERENTIAL PROGRAMMING OF TWO-TERMINAL MEMORY WITH PROGRAM DETECT...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

CAPACITANCE MEASUREMENT AND APPARATUS FOR RESISTIVE SWITCHING MEMOR...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

RESISTIVE RANDOM ACCESS MEMORY ERASE TECHNIQUES AND APPARATUS

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

RESISTIVE RANDOM-ACCESS MEMORY AND ARCHITECTURE WITH SELECT AND CON...

NON-VOLATILE MEMORY CELL UTILIZING VOLATILE SWITCHING TWO TERMINAL...

RESISTIVE RANDOM ACCESS MEMORY PROGRAM AND ERASE TECHNIQUES AND APP...

NETWORK ROUTER DEVICE WITH HARDWARE-IMPLEMENTED LOOKUPS INCLUDING T...

COMPUTING MEMORY ARCHITECTURE

RESISTIVE RANDOM ACCESS MEMORY MATRIX MULTIPLICATION STRUCTURES AND...

SWITCHING BLOCK CONFIGURATION BIT COMPRISING A NON-VOLATILE MEMORY...

NODE RETAINER CIRCUIT INCORPORATING RRAM

NON-VOLATILE RESISTIVE MEMORY CONFIGURATION CELL FOR FIELD PROGRAMM...

SENSING A NON-VOLATILE MEMORY DEVICE UTILIZING SELECTOR DEVICE HOLD...

HIGH DENSITY SELECTOR-BASED NON VOLATILE MEMORY CELL AND FABRICATION

NODE RETAINER CIRCUIT INCORPORATING RRAM

SELECTOR-BASED NON-VOLATILE CELL FABRICATION UTILIZING IC-FOUNDRY C...

NON-VOLATILE MEMORY CELL UTILIZING VOLATILE SWITCHING TWO TERMINAL...

SENSING A NON-VOLATILE MEMORY DEVICE UTILIZING SELECTOR DEVICE HOLD...

NAND ARRAY COMPRISING PARALLEL TRANSISTOR AND TWO-TERMINAL SWITCHIN...

MEMORY ARRAY ARCHITECTURE WITH TWO-TERMINAL MEMORY CELLS

THREE DIMENSION PROGRAMMABLE RESISTIVE RANDOM ACCESSED MEMORY ARRAY...

CT-NOR DIFFERENTIAL BITLINE SENSING ARCHITECTURE