Hans Dieter Oberle

Person

Puchheim, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for tolerance analysis for digital and/or digi...
- Patent number 7,487,060
- Issue date Feb 3, 2009
- Infineon Technologies AG
- Hans-Dieter Oberle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input and output circuit of an integrated circuit and a method for...
- Patent number 7,453,282
- Issue date Nov 18, 2008
- Infineon Technologies AG
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Grant
Method and device for detecting period length fluctuations of perio...
- Patent number 7,254,502
- Issue date Aug 7, 2007
- Infineon Technologies AG
- Hans-Dieter Oberle
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for the testing of input/output drivers of a c...
- Patent number 6,944,810
- Issue date Sep 13, 2005
- Infineon Technologies AG
- Hans-Dieter Oberle
- G01 - MEASURING TESTING
Information Patent Grant
Integrated semiconductor memory
- Patent number RE36061
- Issue date Jan 26, 1999
- Siemens Aktiengesellschaft
- Kurt Hoffmann
- 365 - Static information storage and retrieval
Information Patent Grant
Integrated semiconductor memory device capable of switching from a...
- Patent number 5,497,350
- Issue date Mar 5, 1996
- Siemens Aktiengesellschaft
- Peter Muhmenthaler
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory with parallel test capability and r...
- Patent number 5,293,386
- Issue date Mar 8, 1994
- Siemens Aktiengesellschaft
- Peter Muhmenthaler
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory
- Patent number 5,253,209
- Issue date Oct 12, 1993
- Siemens Aktiengesellschaft
- Kurt Hoffmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration and a method of testing storage cells
- Patent number 4,956,819
- Issue date Sep 11, 1990
- Siemens Aktiengesellschaft
- Kurt Hoffmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Testable redundancy decoder of an integrated semiconductor memory
- Patent number 4,922,134
- Issue date May 1, 1990
- Siemens Aktiengesellschaft
- Kurt Hoffmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit configuration of the parallel input of data into...
- Patent number 4,885,748
- Issue date Dec 5, 1989
- Siemens Aktiengesellschaft
- Kurt Hoffmann
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Apparatus and Method for Tolerance Analysis for Digital and/or Digi...
- Publication number 20070239385
- Publication date Oct 11, 2007
- Hans-Dieter Oberle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Input and output circuit an integrated circuit and method for testi...
- Publication number 20060273820
- Publication date Dec 7, 2006
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Application
Method and device for detecting period length fluctuations of perio...
- Publication number 20050241362
- Publication date Nov 3, 2005
- Hans-Dieter Oberle
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for the testing of input/output drivers of a c...
- Publication number 20030030461
- Publication date Feb 13, 2003
- Infineon Technologies AG
- Hans-Dieter Oberle
- G01 - MEASURING TESTING

Hans Dieter Oberle

Person

Patents Grantslast 30 patents

Apparatus and method for tolerance analysis for digital and/or digi...

Input and output circuit of an integrated circuit and a method for...

Method and device for detecting period length fluctuations of perio...

Method and apparatus for the testing of input/output drivers of a c...

Integrated semiconductor memory

Integrated semiconductor memory device capable of switching from a...

Integrated semiconductor memory with parallel test capability and r...

Integrated semiconductor memory

Circuit configuration and a method of testing storage cells

Testable redundancy decoder of an integrated semiconductor memory

Method and circuit configuration of the parallel input of data into...

Patents Applicationslast 30 patents

Apparatus and Method for Tolerance Analysis for Digital and/or Digi...

Input and output circuit an integrated circuit and method for testi...

Method and device for detecting period length fluctuations of perio...

Method and apparatus for the testing of input/output drivers of a c...