Hayden Clay Cranford, Jr.

Person

Apex, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Skewed double differential pair circuit for offset cancellation
- Patent number 8,302,037
- Issue date Oct 30, 2012
- International Business Machines Corporation
- Igor Arsovski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transmitter bandwidth optimization circuit
- Patent number 8,219,040
- Issue date Jul 10, 2012
- International Business Machines Corporation
- Louis L. Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Design structure for transmitter bandwidth optimization circuit
- Patent number 8,219,041
- Issue date Jul 10, 2012
- International Business Machines Corporation
- Louis L. Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable gain amplifier with reduced power consumption
- Patent number 8,183,920
- Issue date May 22, 2012
- International Business Machines Corporation
- Jieming Qi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and arrangements for link power reduction
- Patent number 8,130,887
- Issue date Mar 6, 2012
- International Business Machines Corporation
- Hayden Clavie Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adaptive noise suppression using a noise look-up table
- Patent number 8,077,534
- Issue date Dec 13, 2011
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock and data recovery system and method for clock and data recove...
- Patent number 8,054,926
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Hayden Clavie Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus for transmitting data and additional information simultan...
- Patent number 8,054,867
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for balancing delay of signal communication paths...
- Patent number 8,051,340
- Issue date Nov 1, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and systems of powering on integrated circuit
- Patent number 8,016,482
- Issue date Sep 13, 2011
- International Business Machines Corporation
- Igor Arsovski
- G05 - CONTROLLING REGULATING
Information Patent Grant
Receiver termination circuit for a high speed direct current (DC) s...
- Patent number 7,995,660
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Carrie E. Cox
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and arrangements for clock and data recovery in communications
- Patent number 7,983,368
- Issue date Jul 19, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Test circuit for serial link receiver
- Patent number 7,940,846
- Issue date May 10, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- G01 - MEASURING TESTING
Information Patent Grant
Bias circuit for a MOS device
- Patent number 7,936,208
- Issue date May 3, 2011
- International Business Machines Corporation
- Steven Mark Clements
- G05 - CONTROLLING REGULATING
Information Patent Grant
Structure for intrinsic RC power distribution for noise filtering o...
- Patent number 7,932,774
- Issue date Apr 26, 2011
- International Business Machines Corporation
- Anthony R. Bonaccio
- G05 - CONTROLLING REGULATING
Information Patent Grant
System and circuit for determining data signal jitter via asynchron...
- Patent number 7,930,120
- Issue date Apr 19, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and arrangements for clock and data recovery in communications
- Patent number 7,916,820
- Issue date Mar 29, 2011
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Critical path redundant logic for mitigation of hardware across chi...
- Patent number 7,898,286
- Issue date Mar 1, 2011
- International Business Machines Corporation
- Igor Arsovski
- G01 - MEASURING TESTING
Information Patent Grant
Adaptive common mode bias for differential amplifier input circuits
- Patent number 7,893,766
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Hayden Clavie Cranford, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Structure for on-chip electromigration monitoring system
- Patent number 7,840,916
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Louis L. Hsu
- G01 - MEASURING TESTING
Information Patent Grant
One-sample-per-bit decision feedback equalizer (DFE) clock and data...
- Patent number 7,809,054
- Issue date Oct 5, 2010
- International Business Machines Corporation
- Juan A. Carballo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and circuit for constructing a synchronous signal diagram fr...
- Patent number 7,792,649
- Issue date Sep 7, 2010
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Design structure for a flexible multimode logic element for use in...
- Patent number 7,770,139
- Issue date Aug 3, 2010
- International Business Machines Corporation
- Igor Arsovski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed serial link output stage having self adaptation for vari...
- Patent number 7,769,057
- Issue date Aug 3, 2010
- International Business Machines Corporation
- Steven M. Clements
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Intrinsic RC power distribution for noise filtering of analog supplies
- Patent number 7,755,420
- Issue date Jul 13, 2010
- International Business Machines Corporation
- Anthony R. Bonaccio
- G05 - CONTROLLING REGULATING
Information Patent Grant
On-chip electromigration monitoring
- Patent number 7,719,302
- Issue date May 18, 2010
- International Business Machines Corporation
- Louis L. Hsu
- G01 - MEASURING TESTING
Information Patent Grant
Method for on-chip diagnostic testing and checking of receiver margins
- Patent number 7,721,134
- Issue date May 18, 2010
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- G01 - MEASURING TESTING
Information Patent Grant
Design structures of powering on integrated circuit
- Patent number 7,716,007
- Issue date May 11, 2010
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for manufacturing a calibration device
- Patent number 7,698,802
- Issue date Apr 20, 2010
- International Business Machines Corporation
- Steven M. Clements
- G01 - MEASURING TESTING
Information Patent Grant
Driver circuit
- Patent number 7,692,447
- Issue date Apr 6, 2010
- International Business Machines Corporation
- Hayden Clavie Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
VARIABLE GAIN AMPLIFIER WITH REDUCED POWER CONSUMPTION
- Publication number 20120001691
- Publication date Jan 5, 2012
- International Business Machines Corporation
- Jieming Qi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE COMMON MODE BIAS FOR DIFFERENTIAL AMPLIFIER INPUT CIRCUITS
- Publication number 20110057727
- Publication date Mar 10, 2011
- International Business Machines Corporation
- Hayden C. Cranford, JR.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ENVIRONMENTAL AND COMPUTING COST REDUCTION WITH IMPROVED RELIABILIT...
- Publication number 20100228861
- Publication date Sep 9, 2010
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Critical Path Redundant Logic for Mitigation of Hardware Across Chi...
- Publication number 20100201377
- Publication date Aug 12, 2010
- International Business Machines Corporation
- Igor ARSOVSKI
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND CIRCUIT FOR DETERMINING DATA SIGNAL JITTER VIA ASYNCHRON...
- Publication number 20100030503
- Publication date Feb 4, 2010
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BIAS CIRCUIT FOR A MOS DEVICE
- Publication number 20100026376
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Steven Mark Clements
- G05 - CONTROLLING REGULATING
Information Patent Application
Adaptive Noise Suppression Using a Noise Look-up Table
- Publication number 20100031067
- Publication date Feb 4, 2010
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Skewed Double Differential Pair Circuit for Offset Cancelllation
- Publication number 20090261882
- Publication date Oct 22, 2009
- International Business Machines Corporation
- Igor Arsovski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS FOR TRANSMITTING DATA AND ADDITIONAL INFORMATION SIMULTAN...
- Publication number 20090201973
- Publication date Aug 13, 2009
- International Business Machines Corporation
- Hayden C. Cranford, JR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems and Arrangements to Provide Input Offset Voltage Compensation
- Publication number 20090146722
- Publication date Jun 11, 2009
- International Business Machines Corporation
- Minhan Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Structure for transmitter bandwidth optimization circuit
- Publication number 20090129485
- Publication date May 21, 2009
- International Business Machines Corporation
- Louis L. Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Design structure for on-chip electromigration monitoring system
- Publication number 20090132985
- Publication date May 21, 2009
- International Business Machines Corporation
- Louis L. Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT FOR PROVIDING AUTOMATIC ADAPTATION TO FREQUENCY OFFSETS IN...
- Publication number 20090116593
- Publication date May 7, 2009
- International Business Machines Corporation
- HAYDEN C. CRANFORD, JR.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVER TERMINATION CIRCUIT FOR A HIGH SPEED DIRECT CURRENT (DC) S...
- Publication number 20090110084
- Publication date Apr 30, 2009
- International Business Machines Corporation
- Carrie E. Cox
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Design Structure for a Flexible Multimode Logic Element For Use In...
- Publication number 20090108869
- Publication date Apr 30, 2009
- International Business Machines Corporation
- Igor Arsovski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD TO MINIMIZE TRANSITION TIME BETWEEN CIRCUIT OPERA...
- Publication number 20090091375
- Publication date Apr 9, 2009
- International Business Machines Corporation
- Carrie Ellen COX
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES
- Publication number 20090051420
- Publication date Feb 26, 2009
- International Business Machines Corporation
- Anthony R. Bonaccio
- G05 - CONTROLLING REGULATING
Information Patent Application
STRUCTURES OF POWERING ON INTEGRATED CIRCUIT
- Publication number 20090024972
- Publication date Jan 22, 2009
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT
- Publication number 20090022203
- Publication date Jan 22, 2009
- Igor Arsovski
- G05 - CONTROLLING REGULATING
Information Patent Application
DESIGN STRUCTURES, METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIR...
- Publication number 20090021085
- Publication date Jan 22, 2009
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSMITTER BANDWIDTH OPTIMIZATION CIRCUIT
- Publication number 20090004978
- Publication date Jan 1, 2009
- International Business Machines Corporation
- Louis L. Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH SPEED SERIAL LINK OUTPUT STAGE HAVING SELF ADAPTATION FOR VARI...
- Publication number 20080285661
- Publication date Nov 20, 2008
- International Business Machines Corporation
- Steven M. Clements
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and Arrangements for Link Power Reduction
- Publication number 20080285695
- Publication date Nov 20, 2008
- Hayden Clavie Cranford, JR.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Driver Circuit
- Publication number 20080284466
- Publication date Nov 20, 2008
- Hayden Clavie Cranford, JR.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Differential Amplifier and Method
- Publication number 20080018400
- Publication date Jan 24, 2008
- Hayden C. Cranford, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Determining Data Signal Jitter Via Asynchr...
- Publication number 20080004821
- Publication date Jan 3, 2008
- Hayden C. Cranford, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transistor Switch with Integral Body Connection to Prevent Latchup
- Publication number 20070268065
- Publication date Nov 22, 2007
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR CONTROLLING COMMON-MODE OUTPUT VOLTAGE IN...
- Publication number 20060022753
- Publication date Feb 2, 2006
- International Business Machines Corporation
- Anthony R. Bonaccio
- H03 - BASIC ELECTRONIC CIRCUITRY

Hayden Clay Cranford, Jr.

Person

Patents Grantslast 30 patents

Skewed double differential pair circuit for offset cancellation

Transmitter bandwidth optimization circuit

Design structure for transmitter bandwidth optimization circuit

Variable gain amplifier with reduced power consumption

Method and arrangements for link power reduction

Adaptive noise suppression using a noise look-up table

Clock and data recovery system and method for clock and data recove...

Apparatus for transmitting data and additional information simultan...

System and method for balancing delay of signal communication paths...

Method and systems of powering on integrated circuit

Receiver termination circuit for a high speed direct current (DC) s...

Systems and arrangements for clock and data recovery in communications

Test circuit for serial link receiver

Bias circuit for a MOS device

Structure for intrinsic RC power distribution for noise filtering o...

System and circuit for determining data signal jitter via asynchron...

Systems and arrangements for clock and data recovery in communications

Critical path redundant logic for mitigation of hardware across chi...

Adaptive common mode bias for differential amplifier input circuits

Structure for on-chip electromigration monitoring system

One-sample-per-bit decision feedback equalizer (DFE) clock and data...

System and circuit for constructing a synchronous signal diagram fr...

Design structure for a flexible multimode logic element for use in...

High speed serial link output stage having self adaptation for vari...

Intrinsic RC power distribution for noise filtering of analog supplies

On-chip electromigration monitoring

Method for on-chip diagnostic testing and checking of receiver margins

Design structures of powering on integrated circuit

Method for manufacturing a calibration device

Driver circuit

Patents Applicationslast 30 patents

VARIABLE GAIN AMPLIFIER WITH REDUCED POWER CONSUMPTION

ADAPTIVE COMMON MODE BIAS FOR DIFFERENTIAL AMPLIFIER INPUT CIRCUITS

ENVIRONMENTAL AND COMPUTING COST REDUCTION WITH IMPROVED RELIABILIT...

Critical Path Redundant Logic for Mitigation of Hardware Across Chi...

SYSTEM AND CIRCUIT FOR DETERMINING DATA SIGNAL JITTER VIA ASYNCHRON...

BIAS CIRCUIT FOR A MOS DEVICE

Adaptive Noise Suppression Using a Noise Look-up Table

Skewed Double Differential Pair Circuit for Offset Cancelllation

APPARATUS FOR TRANSMITTING DATA AND ADDITIONAL INFORMATION SIMULTAN...

Systems and Arrangements to Provide Input Offset Voltage Compensation

Structure for transmitter bandwidth optimization circuit

Design structure for on-chip electromigration monitoring system

CIRCUIT FOR PROVIDING AUTOMATIC ADAPTATION TO FREQUENCY OFFSETS IN...

RECEIVER TERMINATION CIRCUIT FOR A HIGH SPEED DIRECT CURRENT (DC) S...

Design Structure for a Flexible Multimode Logic Element For Use In...

SYSTEM AND METHOD TO MINIMIZE TRANSITION TIME BETWEEN CIRCUIT OPERA...

INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES

STRUCTURES OF POWERING ON INTEGRATED CIRCUIT

METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIRCUIT

DESIGN STRUCTURES, METHOD AND SYSTEMS OF POWERING ON INTEGRATED CIR...

TRANSMITTER BANDWIDTH OPTIMIZATION CIRCUIT

HIGH SPEED SERIAL LINK OUTPUT STAGE HAVING SELF ADAPTATION FOR VARI...

Method and Arrangements for Link Power Reduction

Driver Circuit

Differential Amplifier and Method

Method and Apparatus for Determining Data Signal Jitter Via Asynchr...

Transistor Switch with Integral Body Connection to Prevent Latchup

METHOD AND APPARATUS FOR CONTROLLING COMMON-MODE OUTPUT VOLTAGE IN...