Hebbalalu S. Ramagopal

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory system for supporting multiple parallel accesses at very hig...
- Patent number 6,963,962
- Issue date Nov 8, 2005
- Analog Devices, Inc.
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tiered memory bank having different data buffer sizes with a...
- Patent number 6,898,690
- Issue date May 24, 2005
- Intel Corporation
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tiered memory bank having different data buffer sizes with a...
- Patent number 6,606,684
- Issue date Aug 12, 2003
- Intel Corporation
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Snoop resynchronization mechanism to preserve read ordering
- Patent number 6,473,837
- Issue date Oct 29, 2002
- Advanced Micro Devices, Inc.
- William Alexander Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load/store unit having pre-cache and post-cache queues for low late...
- Patent number 6,473,832
- Issue date Oct 29, 2002
- Advanced Micro Devices, Inc.
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System having a configurable cache/SRAM memory
- Patent number 6,446,181
- Issue date Sep 3, 2002
- Intel Corporation
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for speculatively storing and restoring data to a cache m...
- Patent number 5,838,943
- Issue date Nov 17, 1998
- Advanced Micro Devices, Inc.
- Hebbalalu Suryaprakash Ramagopal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Multi-tiered memory bank having different data buffer sizes with a...
- Publication number 20040034739
- Publication date Feb 19, 2004
- Intel Corporation a Delaware corporation
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital signal processor architecture for high computation speed
- Publication number 20030196072
- Publication date Oct 16, 2003
- Murali S. Chinnakonda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory system for supporting multiple parallel accesses at very hig...
- Publication number 20030196058
- Publication date Oct 16, 2003
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING

Hebbalalu S. Ramagopal

Person

Patents Grantslast 30 patents

Memory system for supporting multiple parallel accesses at very hig...

Multi-tiered memory bank having different data buffer sizes with a...

Multi-tiered memory bank having different data buffer sizes with a...

Snoop resynchronization mechanism to preserve read ordering

Load/store unit having pre-cache and post-cache queues for low late...

System having a configurable cache/SRAM memory

Apparatus for speculatively storing and restoring data to a cache m...

Patents Applicationslast 30 patents

Multi-tiered memory bank having different data buffer sizes with a...

Digital signal processor architecture for high computation speed

Memory system for supporting multiple parallel accesses at very hig...