Heinz Hoenigschmid

Person

Poeking, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Link evaluation for a memory device
- Patent number 12,334,172
- Issue date Jun 17, 2025
- Micron Technology, Inc.
- Markus Balb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interrupt signaling for a memory device
- Patent number 12,099,746
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Markus Balb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory health status reporting
- Patent number 11,775,378
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Markus Balb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link evaluation for a memory device
- Patent number 11,615,862
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Markus Balb
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory scheduler for managing maintenance operations in a resistive...
- Patent number 8,595,449
- Issue date Nov 26, 2013
- Qimonda AG
- Michael Kund
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with resistive memory cells and method for manuf...
- Patent number 8,072,792
- Issue date Dec 6, 2011
- Qimonda AG
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for an integrated circuit with programmable me...
- Patent number 8,064,243
- Issue date Nov 22, 2011
- Qimonda AG
- Milena Ivanov
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of determining a memory state of a resistive memory cell and...
- Patent number 7,869,253
- Issue date Jan 11, 2011
- Qimonda AG
- Corvin Liaw
- B82 - NANO-TECHNOLOGY
Information Patent Grant
FB DRAM memory with state memory
- Patent number 7,848,134
- Issue date Dec 7, 2010
- Qimonda AG
- Milena Ivanov
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having a resistively switching memory and method
- Patent number 7,656,697
- Issue date Feb 2, 2010
- Qimonda AG
- Michael Markert
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit including a resistive memory element and method for...
- Patent number 7,599,209
- Issue date Oct 6, 2009
- Infineon Technologies AG
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit, method for operating a memory circuit, memory devic...
- Patent number 7,522,444
- Issue date Apr 21, 2009
- Infineon Technologies AG
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory device and method for writing to a resistive memor...
- Patent number 7,518,902
- Issue date Apr 14, 2009
- Infineon Technologies AG
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for operating such a memory device
- Patent number 7,447,053
- Issue date Nov 4, 2008
- Infineon Technologies AG
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and memory circuit for operating a resistive memory cell
- Patent number 7,428,163
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, memory chip and method of evaluating a memory s...
- Patent number 7,400,521
- Issue date Jul 15, 2008
- Qimoda AG
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for generating a reference voltage and for reading a memory...
- Patent number 7,342,819
- Issue date Mar 11, 2008
- Infineon Technologies AG
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Ultra compact DRAM cell and method of making
- Patent number 6,552,378
- Issue date Apr 22, 2003
- International Business Machines Corporation
- Heinz Hoenigschmid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy feature reduction using optical proximity effect correction
- Patent number 6,426,269
- Issue date Jul 30, 2002
- International Business Machines Corporation
- Henning Haffner
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Sense amplifier
- Patent number 6,420,908
- Issue date Jul 16, 2002
- Infineon Technologies AG
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline driver circuit using ring-shaped devices
- Patent number 6,236,258
- Issue date May 22, 2001
- International Business Machines Corporation
- Heinz Hoenigschmid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit memory with low resistance, segmented power supp...
- Patent number 6,157,561
- Issue date Dec 5, 2000
- Infineon Technologies AG
- Tobias Schlager
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM cell with transfer device extending along perimeter of trench...
- Patent number 6,037,620
- Issue date Mar 14, 2000
- International Business Machines Corporation
- Heinz Hoenigschmid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced stand by power consumption in a DRAM
- Patent number 5,970,009
- Issue date Oct 19, 1999
- Siemens Aktiengesellschaft
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having hierarchical bit line architecture with...
- Patent number 5,966,315
- Issue date Oct 12, 1999
- Siemens Aktiengesellschaft
- Gerhard Muller
- G11 - INFORMATION STORAGE
Information Patent Grant
Space-efficient semiconductor memory having hierarchical column sel...
- Patent number 5,923,605
- Issue date Jul 13, 1999
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic access memory equalizer circuits and methods therefor
- Patent number 5,875,138
- Issue date Feb 23, 1999
- Siemens Aktiengesellschaft
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
High density semiconductor memory having diagonal bit lines and dua...
- Patent number 5,864,496
- Issue date Jan 26, 1999
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LINK EVALUATION FOR A MEMORY DEVICE
- Publication number 20230197181
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Markus Balb
- G11 - INFORMATION STORAGE
Information Patent Application
LINK EVALUATION FOR A MEMORY DEVICE
- Publication number 20210193252
- Publication date Jun 24, 2021
- Micron Technology, Inc.
- Markus Balb
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPT SIGNALING FOR A MEMORY DEVICE
- Publication number 20210181990
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Markus Balb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY HEALTH STATUS REPORTING
- Publication number 20210182141
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Markus Balb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Scheduler for Managing Internal Memory Operations
- Publication number 20100058018
- Publication date Mar 4, 2010
- QIMONDA AG
- Michael Kund
- G11 - INFORMATION STORAGE
Information Patent Application
FB DRAM Memory with State Memory
- Publication number 20100020586
- Publication date Jan 28, 2010
- Milena Ivanov
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND METHOD OF EVALUATING A MEMORY STATE OF A RESISTIVE MEMOR...
- Publication number 20090257264
- Publication date Oct 15, 2009
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit and Method of Improved Determining a Memory Stat...
- Publication number 20090213643
- Publication date Aug 27, 2009
- Michael Angerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH RESISTIVE MEMORY CELLS AND METHOD FOR MANUF...
- Publication number 20090207646
- Publication date Aug 20, 2009
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY CELL AND METHOD FOR OPERATING SAME
- Publication number 20090201714
- Publication date Aug 13, 2009
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR AN INTEGRATED CIRCUIT WITH PROGRAMMABLE ME...
- Publication number 20090122586
- Publication date May 14, 2009
- Milena Ivanov
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Memory Module, Method of Operating an Integrate...
- Publication number 20080263415
- Publication date Oct 23, 2008
- Bernhard Ruf
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Memory Module, Method of Operating an Integrate...
- Publication number 20080259676
- Publication date Oct 23, 2008
- Bernhard Ruf
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING A RESISTIVELY SWITCHING MEMORY AND METHOD
- Publication number 20080239788
- Publication date Oct 2, 2008
- QIMONDA AG
- Michael Markert
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING A RESISTIVE MEMORY
- Publication number 20080192529
- Publication date Aug 14, 2008
- QIMONDA AG
- Heinz HOENIGSCHMID
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT, MEMORY CHIP AND METHOD OF EVALUATING A MEMORY S...
- Publication number 20080170444
- Publication date Jul 17, 2008
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor component with through-vias
- Publication number 20080142928
- Publication date Jun 19, 2008
- Arkalgud Sitaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of determining a memory state of a resistive memory cell and...
- Publication number 20080043521
- Publication date Feb 21, 2008
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
INTERGRATED CIRCUIT HAVING MEMORY WITH RESISTIVE MEMORY CELLS
- Publication number 20080043513
- Publication date Feb 21, 2008
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND MEMORY CIRCUIT FOR OPERATING A RESISTIVE MEMORY CELL
- Publication number 20080019163
- Publication date Jan 24, 2008
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit, method for operating a memory circuit, memory devic...
- Publication number 20070211514
- Publication date Sep 13, 2007
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method for operating such a memory device
- Publication number 20070211513
- Publication date Sep 13, 2007
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
Methods for generating a reference voltage and for reading a memory...
- Publication number 20070206402
- Publication date Sep 6, 2007
- Corvin Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit having a resistive memory cell and method for operat...
- Publication number 20070195580
- Publication date Aug 23, 2007
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
CBRAM memory device and method for writing to a resistive memory ce...
- Publication number 20070171697
- Publication date Jul 26, 2007
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit including a resistive memory element and method for...
- Publication number 20070171698
- Publication date Jul 26, 2007
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory circuit comprising a resistive memory element and...
- Publication number 20070047291
- Publication date Mar 1, 2007
- Heinz Hoenigschmid
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER
- Publication number 20020000839
- Publication date Jan 3, 2002
- GERHARD MUELLER
- G11 - INFORMATION STORAGE

Heinz Hoenigschmid

Person

Patents Grantslast 30 patents

Link evaluation for a memory device

Interrupt signaling for a memory device

Memory health status reporting

Link evaluation for a memory device

Memory scheduler for managing maintenance operations in a resistive...

Integrated circuit with resistive memory cells and method for manuf...

Method and apparatus for an integrated circuit with programmable me...

Method of determining a memory state of a resistive memory cell and...

FB DRAM memory with state memory

Integrated circuit having a resistively switching memory and method

Memory circuit including a resistive memory element and method for...

Memory circuit, method for operating a memory circuit, memory devic...

Resistive memory device and method for writing to a resistive memor...

Memory device and method for operating such a memory device

Method and memory circuit for operating a resistive memory cell

Integrated circuit, memory chip and method of evaluating a memory s...

Methods for generating a reference voltage and for reading a memory...

Ultra compact DRAM cell and method of making

Dummy feature reduction using optical proximity effect correction

Sense amplifier

Wordline driver circuit using ring-shaped devices

Integrated circuit memory with low resistance, segmented power supp...

DRAM cell with transfer device extending along perimeter of trench...

Reduced stand by power consumption in a DRAM

Semiconductor memory having hierarchical bit line architecture with...

Space-efficient semiconductor memory having hierarchical column sel...

Dynamic access memory equalizer circuits and methods therefor

High density semiconductor memory having diagonal bit lines and dua...

Patents Applicationslast 30 patents

LINK EVALUATION FOR A MEMORY DEVICE

LINK EVALUATION FOR A MEMORY DEVICE

INTERRUPT SIGNALING FOR A MEMORY DEVICE

MEMORY HEALTH STATUS REPORTING

Memory Scheduler for Managing Internal Memory Operations

FB DRAM Memory with State Memory

MEMORY AND METHOD OF EVALUATING A MEMORY STATE OF A RESISTIVE MEMOR...

Integrated Circuit and Method of Improved Determining a Memory Stat...

INTEGRATED CIRCUIT WITH RESISTIVE MEMORY CELLS AND METHOD FOR MANUF...

RESISTIVE MEMORY CELL AND METHOD FOR OPERATING SAME

METHOD AND APPARATUS FOR AN INTEGRATED CIRCUIT WITH PROGRAMMABLE ME...

Integrated Circuit, Memory Module, Method of Operating an Integrate...

Integrated Circuit, Memory Module, Method of Operating an Integrate...

INTEGRATED CIRCUIT HAVING A RESISTIVELY SWITCHING MEMORY AND METHOD

INTEGRATED CIRCUIT HAVING A RESISTIVE MEMORY

INTEGRATED CIRCUIT, MEMORY CHIP AND METHOD OF EVALUATING A MEMORY S...

Semiconductor component with through-vias

Method of determining a memory state of a resistive memory cell and...

INTERGRATED CIRCUIT HAVING MEMORY WITH RESISTIVE MEMORY CELLS

METHOD AND MEMORY CIRCUIT FOR OPERATING A RESISTIVE MEMORY CELL

Memory circuit, method for operating a memory circuit, memory devic...

Memory device and method for operating such a memory device

Methods for generating a reference voltage and for reading a memory...

Memory circuit having a resistive memory cell and method for operat...

CBRAM memory device and method for writing to a resistive memory ce...

Memory circuit including a resistive memory element and method for...

Integrated memory circuit comprising a resistive memory element and...

SENSE AMPLIFIER