Hemanshu D. Bhatt

Person

Blacksburg, VA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Alternate pad structures/passivation inegration schemes to reduce o...
- Patent number 8,552,560
- Issue date Oct 8, 2013
- LSI Corporation
- Hemanshu Bhatt
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Reduction of macro level stresses in copper/low-K wafers
- Patent number 8,076,779
- Issue date Dec 13, 2011
- LSI Corporation
- Sey-Shing Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer-less transistor integration scheme for high-K gate dielectri...
- Patent number 7,955,919
- Issue date Jun 7, 2011
- LSI Corporation
- David Pritchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned cell integration scheme
- Patent number 7,915,122
- Issue date Mar 29, 2011
- Nantero, Inc.
- Richard J. Carter
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for redirecting void diffusion away from vias in an integrat...
- Patent number 7,582,566
- Issue date Sep 1, 2009
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Eliminate IMC cracking in post wirebonded dies: macro level stress...
- Patent number 7,531,442
- Issue date May 12, 2009
- LSI Corporation
- Jayanthi Pallinti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for forming passive devices during semiconductor back-en...
- Patent number 7,456,076
- Issue date Nov 25, 2008
- LSI Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for diverting void diffusion in integrated cir...
- Patent number 7,436,040
- Issue date Oct 14, 2008
- LSI Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nano structure electrode design
- Patent number 7,402,770
- Issue date Jul 22, 2008
- LSI Logic Corporation
- Sey-Shing Sun
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with inductor having horizontal magnetic flux lines
- Patent number 7,384,801
- Issue date Jun 10, 2008
- LSI Corporation
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for redirecting void diffusion away from vias...
- Patent number 7,361,965
- Issue date Apr 22, 2008
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnect manufacturing process
- Patent number 7,259,083
- Issue date Aug 21, 2007
- LSI Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with inductor having horizontal magnetic flux lines
- Patent number 7,253,497
- Issue date Aug 7, 2007
- LSI Corporation
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduce or eliminate IMC cracking in post wire bonded dies by doping...
- Patent number 7,205,673
- Issue date Apr 17, 2007
- LSI Logic Corporation
- Jayanthi Pallinti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for forming passive devices during semiconductor back-en...
- Patent number 7,122,436
- Issue date Oct 17, 2006
- LSI Logic Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanism for improving the structural integrity of low-k films
- Patent number 6,982,206
- Issue date Jan 3, 2006
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Temperature control system
- Patent number 6,967,177
- Issue date Nov 22, 2005
- LSI Logic Corporation
- Charles E. May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming a low k carbon-doped silicon oxide dielectric m...
- Patent number 6,583,026
- Issue date Jun 24, 2003
- LSI Logic Corporation
- Derryl D. J. Allman
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Process for forming integrated circuit structure with low dielectri...
- Patent number 6,537,923
- Issue date Mar 25, 2003
- LSI Logic Corporation
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable read only memory in CMOS process flow
- Patent number 6,495,881
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Shafqat Ahmed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory in CMOS process flow
- Patent number 6,495,419
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Shafqat Ahmed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for planarizing an isolation structure in a substrate
- Patent number 6,482,075
- Issue date Nov 19, 2002
- LSI Logic Corporation
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable read only memory in CMOS process flow
- Patent number 6,338,992
- Issue date Jan 15, 2002
- LSI Logic Corporation
- Shafqat Ahmed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simple method of fabricating ferroelectric capacitors
- Patent number 5,807,774
- Issue date Sep 15, 1998
- Sharp Kabushiki Kaisha
- Seshu B. Desu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High temperature electrode-barriers for ferroelectric and other cap...
- Patent number 5,790,366
- Issue date Aug 4, 1998
- Sharp Kabushiki Kaisha
- Seshu B. Desu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ALTERNATE PAD STRUCTURES/PASSIVATION INTEGRATION SCHEMES TO REDUCE...
- Publication number 20140030541
- Publication date Jan 30, 2014
- LSI Corporation
- Hemanshu Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRAT...
- Publication number 20080132065
- Publication date Jun 5, 2008
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER-LESS TRANSISTOR INTEGRATION SCHEME FOR HIGH-K GATE DIELECTRI...
- Publication number 20080102583
- Publication date May 1, 2008
- LSI Logic Corporation
- David Pritchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for diverting void diffusion in integrated cir...
- Publication number 20070259518
- Publication date Nov 8, 2007
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit with inductor having horizontal magnetic flux lines
- Publication number 20070254448
- Publication date Nov 1, 2007
- LSI Logic Corporation
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for redirecting void diffusion away from vias...
- Publication number 20070155160
- Publication date Jul 5, 2007
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Eliminate IMC cracking in post wirebonded dies: macro level stress...
- Publication number 20070123024
- Publication date May 31, 2007
- LSI Logic Corporation
- Jayanthi Pallinti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Alternate pad structures/passivation inegration schemes to reduce o...
- Publication number 20070114667
- Publication date May 24, 2007
- LSI Logic Corporation
- Hemanshu Bhatt
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Reduction of macro level stresses in copper/Low-K wafers by alterin...
- Publication number 20070102812
- Publication date May 10, 2007
- LSI Logic Corporation
- Sey-Shing Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nano structure electrode design
- Publication number 20060278902
- Publication date Dec 14, 2006
- Sey-Shing Sun
- G11 - INFORMATION STORAGE
Information Patent Application
Self-aligned cell integration scheme
- Publication number 20060281256
- Publication date Dec 14, 2006
- Richard J. Carter
- B82 - NANO-TECHNOLOGY
Information Patent Application
Techniques for forming passive devices during semiconductor back-en...
- Publication number 20060279005
- Publication date Dec 14, 2006
- LSI Logic Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Local interconnect manufacturing process
- Publication number 20060088990
- Publication date Apr 27, 2006
- LSI Logic Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation depth extension using oxygen implantation
- Publication number 20060063338
- Publication date Mar 23, 2006
- LSI Logic Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques for forming passive devices during semiconductor back-en...
- Publication number 20060054997
- Publication date Mar 16, 2006
- LSI Logic Corporation
- Santosh S. Menon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Temperature control system
- Publication number 20050279284
- Publication date Dec 22, 2005
- LSI Logic Corporation
- Charles E. May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Spacer-less transistor integration scheme for high-k gate dielectri...
- Publication number 20050191812
- Publication date Sep 1, 2005
- LSI Logic Corporation
- David Pritchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit with inductor having horizontal magnetic flux lines
- Publication number 20050003562
- Publication date Jan 6, 2005
- Hemanshu D. Bhatt
- H01 - BASIC ELECTRIC ELEMENTS

Hemanshu D. Bhatt

Person

Patents Grantslast 30 patents

Alternate pad structures/passivation inegration schemes to reduce o...

Reduction of macro level stresses in copper/low-K wafers

Spacer-less transistor integration scheme for high-K gate dielectri...

Self-aligned cell integration scheme

Method for redirecting void diffusion away from vias in an integrat...

Eliminate IMC cracking in post wirebonded dies: macro level stress...

Techniques for forming passive devices during semiconductor back-en...

Method and apparatus for diverting void diffusion in integrated cir...

Nano structure electrode design

Integrated circuit with inductor having horizontal magnetic flux lines

Method and apparatus for redirecting void diffusion away from vias...

Local interconnect manufacturing process

Integrated circuit with inductor having horizontal magnetic flux lines

Reduce or eliminate IMC cracking in post wire bonded dies by doping...

Techniques for forming passive devices during semiconductor back-en...

Mechanism for improving the structural integrity of low-k films

Temperature control system

Process for forming a low k carbon-doped silicon oxide dielectric m...

Process for forming integrated circuit structure with low dielectri...

Programmable read only memory in CMOS process flow

Nonvolatile memory in CMOS process flow

Process for planarizing an isolation structure in a substrate

Programmable read only memory in CMOS process flow

Simple method of fabricating ferroelectric capacitors

High temperature electrode-barriers for ferroelectric and other cap...

Patents Applicationslast 30 patents

ALTERNATE PAD STRUCTURES/PASSIVATION INTEGRATION SCHEMES TO REDUCE...

METHOD FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRAT...

SPACER-LESS TRANSISTOR INTEGRATION SCHEME FOR HIGH-K GATE DIELECTRI...

Method and apparatus for diverting void diffusion in integrated cir...

Integrated circuit with inductor having horizontal magnetic flux lines

Method and apparatus for redirecting void diffusion away from vias...

Eliminate IMC cracking in post wirebonded dies: macro level stress...

Alternate pad structures/passivation inegration schemes to reduce o...

Reduction of macro level stresses in copper/Low-K wafers by alterin...

Nano structure electrode design

Self-aligned cell integration scheme

Techniques for forming passive devices during semiconductor back-en...

Local interconnect manufacturing process

Shallow trench isolation depth extension using oxygen implantation

Techniques for forming passive devices during semiconductor back-en...

Temperature control system

Spacer-less transistor integration scheme for high-k gate dielectri...

Integrated circuit with inductor having horizontal magnetic flux lines