Heon Lee

Person

Fishkill, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method to etch poly Si gate stacks with raised STI structure
- Patent number 7,153,781
- Issue date Dec 26, 2006
- Infineon Technologies AG
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micro-casted silicon carbide nano-imprinting stamp
- Patent number 7,080,596
- Issue date Jul 25, 2006
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of forming a shared global word line MRAM structure
- Patent number 6,927,092
- Issue date Aug 9, 2005
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of hardening a nano-imprinting stamp
- Patent number 6,916,511
- Issue date Jul 12, 2005
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Indium chalcogenide, gallium chalcogenide, and indium-gallium chalc...
- Patent number 6,900,468
- Issue date May 31, 2005
- Hewlett-Packard Development Company, L.P.
- Alison Chalken
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabricating sub-lithographic sized line and space pattern...
- Patent number 6,759,180
- Issue date Jul 6, 2004
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micro-casted silicon carbide nano-imprinting stamp
- Patent number 6,755,984
- Issue date Jun 29, 2004
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Contact plug formation for devices with stacked capacitors
- Patent number 6,753,252
- Issue date Jun 22, 2004
- Infineon Technologies AG
- Youngjin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low heat loss and small contact area composite electrode for a phas...
- Patent number 6,746,892
- Issue date Jun 8, 2004
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nano-size imprinting stamp using spacer technique
- Patent number 6,743,368
- Issue date Jun 1, 2004
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of fabricating a sub-lithographic sized via
- Patent number 6,673,714
- Issue date Jan 6, 2004
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low heat loss and small contact area composite electrode for a phas...
- Patent number 6,670,628
- Issue date Dec 30, 2003
- Hewlett-Packard Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device isolation process flow for ARS system
- Patent number 6,664,193
- Issue date Dec 16, 2003
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared global word line magnetic random access memory
- Patent number 6,665,205
- Issue date Dec 16, 2003
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Device isolation process flow for ARS system
- Patent number 6,621,096
- Issue date Sep 16, 2003
- Hewlett-Packard Develpoment Company, L.P.
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change material electronic memory structure and method for fo...
- Patent number 6,605,821
- Issue date Aug 12, 2003
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate smooth-surfaced crystalline phase-change layer...
- Patent number 6,576,318
- Issue date Jun 10, 2003
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual thickness gate oxide fabrication method using plasma surface t...
- Patent number 6,573,192
- Issue date Jun 3, 2003
- Infineon Technologies AG
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device having dual tunnel junction memory cells
- Patent number 6,541,792
- Issue date Apr 1, 2003
- Hewlett-Packard Development Company, LLP
- Lung T. Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate bonding using a selenidation reaction
- Patent number 6,537,846
- Issue date Mar 25, 2003
- Hewlett-Packard Development Company, L.P.
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for ARS mover using selenidation wafer bonding after p...
- Patent number 6,440,820
- Issue date Aug 27, 2002
- Hewlett-Packard Company
- Heon Lee
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Vertical MOSFET
- Patent number 6,440,793
- Issue date Aug 27, 2002
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for ARS mover using selenidation wafer bonding before...
- Patent number 6,436,794
- Issue date Aug 20, 2002
- Hewlett-Packard Company
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Vertical MOSFET
- Patent number 6,414,347
- Issue date Jul 2, 2002
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned LDD formation with one-step implantation for transisto...
- Patent number 6,362,033
- Issue date Mar 26, 2002
- Infineon Technologies AG
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating 4F2 memory cells with improved gate conducto...
- Patent number 6,355,520
- Issue date Mar 12, 2002
- Infineon Technologies AG
- Youngjin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall oxide process for improved shallow junction formation in s...
- Patent number 6,352,934
- Issue date Mar 5, 2002
- Infineon Technologies AG
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate prespacers for high density, high performance DRAMs
- Patent number 6,326,260
- Issue date Dec 4, 2001
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabrication of enlarged stacked capacitors using isotrop...
- Patent number 6,294,436
- Issue date Sep 25, 2001
- Infineon Technologies AG
- Youngjin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing RIE lag for deep trench silicon etching
- Patent number 6,284,666
- Issue date Sep 4, 2001
- International Business Machines Corporation
- Munir D. Naeem
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Hardened nano-imprinting stamp
- Publication number 20050150404
- Publication date Jul 14, 2005
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Micro-casted silicon carbide nano-imprinting stamp
- Publication number 20040169003
- Publication date Sep 2, 2004
- Heon Lee
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
Micro-casted silicon carbide nano-imprinting stamp
- Publication number 20040081800
- Publication date Apr 29, 2004
- Heon Lee
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
Hardened nano-imprinting stamp
- Publication number 20040081798
- Publication date Apr 29, 2004
- Heon Lee
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
LOW HEAT LOSS AND SMALL CONTACT AREA COMPOSITE ELECTRODE FOR A PHAS...
- Publication number 20040077123
- Publication date Apr 22, 2004
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to etch poly Si gate stacks with raised STI structure
- Publication number 20040048483
- Publication date Mar 11, 2004
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shared global word line magnetic random access memory
- Publication number 20040047213
- Publication date Mar 11, 2004
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Method of fabricating a sub-lithographic sized via
- Publication number 20030211729
- Publication date Nov 13, 2003
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device isolation process flow for ARS system
- Publication number 20030207575
- Publication date Nov 6, 2003
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Method of fabricating sub-lithographic sized line and space pattern...
- Publication number 20030203319
- Publication date Oct 30, 2003
- Heon Lee
- B82 - NANO-TECHNOLOGY
Information Patent Application
Low heat loss and small contact area composite electrode for a phas...
- Publication number 20030189200
- Publication date Oct 9, 2003
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shared global word line magnetic random access memory
- Publication number 20030156444
- Publication date Aug 21, 2003
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Nano-size imprinting stamp using spacer technique
- Publication number 20030141276
- Publication date Jul 31, 2003
- Heon Lee
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
MEMORY DEVICE HAVING DUAL TUNNEL JUNCTION MEMORY CELLS
- Publication number 20030052320
- Publication date Mar 20, 2003
- Lung T. Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device isolation process flow for ARS system
- Publication number 20030032290
- Publication date Feb 13, 2003
- Heon Lee
- B82 - NANO-TECHNOLOGY
Information Patent Application
Substrate bonding using a selenidation reaction
- Publication number 20030017679
- Publication date Jan 23, 2003
- Heon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fabricate smooth-surfaced crystalline phase-change layer...
- Publication number 20020182363
- Publication date Dec 5, 2002
- Heon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Device isolation process flow for ARS system
- Publication number 20020173153
- Publication date Nov 21, 2002
- Heon Lee
- B82 - NANO-TECHNOLOGY
Information Patent Application
Contact plug formation for devices with stacked capacitors
- Publication number 20020173094
- Publication date Nov 21, 2002
- Youngjin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Indium chalcogenide, gallium chalcogenide, and indium-gallium chalc...
- Publication number 20020113250
- Publication date Aug 22, 2002
- Alison Chaiken
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL MOSFET
- Publication number 20020089007
- Publication date Jul 11, 2002
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical MOSFET
- Publication number 20020090780
- Publication date Jul 11, 2002
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gate prespacers for high density, high performance drams
- Publication number 20010054729
- Publication date Dec 27, 2001
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Method to etch poly Si gate stacks with raised STI structure

Micro-casted silicon carbide nano-imprinting stamp

Method of forming a shared global word line MRAM structure

Method of hardening a nano-imprinting stamp

Indium chalcogenide, gallium chalcogenide, and indium-gallium chalc...

Method of fabricating sub-lithographic sized line and space pattern...

Micro-casted silicon carbide nano-imprinting stamp

Contact plug formation for devices with stacked capacitors

Low heat loss and small contact area composite electrode for a phas...

Nano-size imprinting stamp using spacer technique

Method of fabricating a sub-lithographic sized via

Low heat loss and small contact area composite electrode for a phas...

Device isolation process flow for ARS system

Shared global word line magnetic random access memory

Device isolation process flow for ARS system

Phase change material electronic memory structure and method for fo...

Method to fabricate smooth-surfaced crystalline phase-change layer...

Dual thickness gate oxide fabrication method using plasma surface t...

Memory device having dual tunnel junction memory cells

Substrate bonding using a selenidation reaction

Process flow for ARS mover using selenidation wafer bonding after p...

Vertical MOSFET

Process flow for ARS mover using selenidation wafer bonding before...

Vertical MOSFET

Self-aligned LDD formation with one-step implantation for transisto...

Method for fabricating 4F2 memory cells with improved gate conducto...

Sidewall oxide process for improved shallow junction formation in s...

Gate prespacers for high density, high performance DRAMs

Method for fabrication of enlarged stacked capacitors using isotrop...

Method of reducing RIE lag for deep trench silicon etching

Patents Applicationslast 30 patents

Hardened nano-imprinting stamp

Micro-casted silicon carbide nano-imprinting stamp

Micro-casted silicon carbide nano-imprinting stamp

Hardened nano-imprinting stamp

LOW HEAT LOSS AND SMALL CONTACT AREA COMPOSITE ELECTRODE FOR A PHAS...

Method to etch poly Si gate stacks with raised STI structure

Shared global word line magnetic random access memory

Method of fabricating a sub-lithographic sized via

Device isolation process flow for ARS system

Method of fabricating sub-lithographic sized line and space pattern...

Low heat loss and small contact area composite electrode for a phas...

Shared global word line magnetic random access memory

Nano-size imprinting stamp using spacer technique

MEMORY DEVICE HAVING DUAL TUNNEL JUNCTION MEMORY CELLS

Device isolation process flow for ARS system

Substrate bonding using a selenidation reaction

Method to fabricate smooth-surfaced crystalline phase-change layer...

Device isolation process flow for ARS system

Contact plug formation for devices with stacked capacitors

Indium chalcogenide, gallium chalcogenide, and indium-gallium chalc...

VERTICAL MOSFET

Vertical MOSFET

Gate prespacers for high density, high performance drams