Hermann Ruckerbauer

Person

Moos, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-port DRAM architecture for accessing different memory partitions
- Patent number 8,914,589
- Issue date Dec 16, 2014
- Infineon Technologies AG
- Peter Gregorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip, multi-chip system in a method for performing a refresh of a m...
- Patent number 8,547,767
- Issue date Oct 1, 2013
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system including plural memory controllers and a memory...
- Patent number 8,495,310
- Issue date Jul 23, 2013
- Qimonda AG
- Peter Gregorius
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Electronic device having a chip stack
- Patent number 8,334,599
- Issue date Dec 18, 2012
- Qimonda AG
- Michael Bruennert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory system with extended memory density capability
- Patent number 8,271,827
- Issue date Sep 18, 2012
- Qimonda
- Christoph Bilger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit having memory chips parallel connected to ports and...
- Patent number 8,183,676
- Issue date May 22, 2012
- Qimonda AG
- Simon Muff
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed command and address bus architecture for a memory modul...
- Patent number 8,161,219
- Issue date Apr 17, 2012
- Qimonda AG
- Michael Bruennert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for determining a skew
- Patent number 8,144,755
- Issue date Mar 27, 2012
- Michael Bruennert
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-die memory, apparatus and multi-die memory stack
- Patent number 8,120,958
- Issue date Feb 21, 2012
- Qimonda AG
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Grant
Bus termination system and method
- Patent number 8,041,865
- Issue date Oct 18, 2011
- Qimonda AG
- Michael Bruennert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit
- Patent number 8,015,438
- Issue date Sep 6, 2011
- Qimonda AG
- Michael Bruennert
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating a memory apparatus, memory device and memory ap...
- Patent number 7,986,582
- Issue date Jul 26, 2011
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating a memory apparatus, memory device and memory ap...
- Patent number 7,957,209
- Issue date Jun 7, 2011
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and articles of manufacture for operating electronic device...
- Patent number 7,956,665
- Issue date Jun 7, 2011
- Qimonda AG
- Daniel Kehrer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with wireless connection
- Patent number 7,928,525
- Issue date Apr 19, 2011
- Qimonda AG
- Christoph Bilger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for storage device with a logic unit and metho...
- Patent number 7,920,433
- Issue date Apr 5, 2011
- Qimonda AG
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed memory architecture
- Patent number 7,848,153
- Issue date Dec 7, 2010
- Qimonda AG
- Michael Bruennert
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method for transferring data therein
- Patent number 7,831,797
- Issue date Nov 9, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory dies for flexible use and method for configuring memory dies
- Patent number 7,796,446
- Issue date Sep 14, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Horizontal dual in-line memory modules
- Patent number 7,771,206
- Issue date Aug 10, 2010
- Qimonda AG
- Michael Bruennert
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of refreshing data in a storage location based on heat dissi...
- Patent number 7,768,857
- Issue date Aug 3, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, chip stack and data processing system
- Patent number 7,698,470
- Issue date Apr 13, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module comprising a plurality of memory devices
- Patent number 7,650,457
- Issue date Jan 19, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 7,638,869
- Issue date Dec 29, 2009
- Qimonda AG
- Roland Irsigler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arrangement of semiconductor memory devices and semiconductor memor...
- Patent number 7,560,807
- Issue date Jul 14, 2009
- Qimonda AG
- Hermann Ruckerbauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with error correction code module
- Patent number 7,519,894
- Issue date Apr 14, 2009
- Infineon Technologies AG
- Christian Weiβ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input receiver circuit
- Patent number 7,477,717
- Issue date Jan 13, 2009
- Infineon Technologies AG
- Maksim Kuzmenka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-speed interface circuit for semiconductor memory chips and mem...
- Patent number 7,475,187
- Issue date Jan 6, 2009
- Infineon Technologies AG
- Peter Gregorius
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer chip and method for controlling one or more memory arrangements
- Patent number 7,447,805
- Issue date Nov 4, 2008
- Infineon Technologies AG
- Georg Braun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor component comprising an integrated semiconductor chip...
- Patent number 7,439,615
- Issue date Oct 21, 2008
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Stacking Technique for Circuit Devices
- Publication number 20110034045
- Publication date Feb 10, 2011
- QIMONDA AG
- Christoph Bilger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Distributed Command and Address Bus Architecture
- Publication number 20100082871
- Publication date Apr 1, 2010
- Michael Bruennert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PORT DRAM ARCHITECTURE
- Publication number 20100077139
- Publication date Mar 25, 2010
- PETER GREGORIUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Dies for Flexible Use and Method for Configuring Memory Dies
- Publication number 20100074038
- Publication date Mar 25, 2010
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI MASTER DRAM ARCHITECTURE
- Publication number 20100077157
- Publication date Mar 25, 2010
- PETER GREGORIUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Horizontal Dual In-line Memory Modules
- Publication number 20100062621
- Publication date Mar 11, 2010
- MICHAEL BRUENNERT
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ELECTRONIC DEVICE HAVING A CHIP STACK
- Publication number 20100044877
- Publication date Feb 25, 2010
- Michael Bruennert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Speed Memory Architecture
- Publication number 20100046266
- Publication date Feb 25, 2010
- Michael Bruennert
- G11 - INFORMATION STORAGE
Information Patent Application
Stacked Memory Module
- Publication number 20100032820
- Publication date Feb 11, 2010
- Michael Bruennert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bus Termination System and Method
- Publication number 20100030934
- Publication date Feb 4, 2010
- Michael Bruennert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CONTROLLING A MEMORY MODULE AND MEMORY CONTROL UNIT
- Publication number 20090287957
- Publication date Nov 19, 2009
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Application
Chip, Multi-Chip System in a Method for Performing a Refresh of a M...
- Publication number 20090268539
- Publication date Oct 29, 2009
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit with Improved Data Rate
- Publication number 20090267678
- Publication date Oct 29, 2009
- QIMONDA AG
- Christoph Bilger
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Integrated circuit with wireless connection
- Publication number 20090267084
- Publication date Oct 29, 2009
- QIMONDA AG
- Christoph Bilger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICE...
- Publication number 20090219063
- Publication date Sep 3, 2009
- Daniel Kehrer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM with Page Access
- Publication number 20090190432
- Publication date Jul 30, 2009
- Christoph BILGER
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR STORAGE DEVICE WITH A LOGIC UNIT AND METHO...
- Publication number 20090175100
- Publication date Jul 9, 2009
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, METHOD FOR ACCESSING A MEMORY DEVICE AND METHOD FOR...
- Publication number 20090175115
- Publication date Jul 9, 2009
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-die Memory, Apparatus and Multi-die Memory Stack
- Publication number 20090161401
- Publication date Jun 25, 2009
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System With Extended Memory Density Capability
- Publication number 20090150710
- Publication date Jun 11, 2009
- Christoph Bilger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Circuit
- Publication number 20090144583
- Publication date Jun 4, 2009
- Qimonda AG
- Michael Bruennert
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF REFRESHING DATA IN A STORAGE LOCATION
- Publication number 20090141576
- Publication date Jun 4, 2009
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Determining a Skew
- Publication number 20090141843
- Publication date Jun 4, 2009
- Qimonda AG
- Michael Bruennert
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR MONITORING A MEMORY DEVICE
- Publication number 20090129189
- Publication date May 21, 2009
- Christoph Bilger
- G11 - INFORMATION STORAGE
Information Patent Application
Method of Operating a Memory Apparatus, Memory Device and Memory Ap...
- Publication number 20090046534
- Publication date Feb 19, 2009
- QIMONDA AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Chip Stack and Data Processing System
- Publication number 20090039915
- Publication date Feb 12, 2009
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Method of Operating a Memory Apparatus, Memory Device and Memory Ap...
- Publication number 20090040861
- Publication date Feb 12, 2009
- QIMONDA AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Module
- Publication number 20080301370
- Publication date Dec 4, 2008
- QIMONDA AG
- Srdjan Djordjevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20080237891
- Publication date Oct 2, 2008
- QIMONDA AG
- Roland Irsigler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory System and Method for Transferring Data Therein
- Publication number 20080022037
- Publication date Jan 24, 2008
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING

Hermann Ruckerbauer

Person

Patents Grantslast 30 patents

Multi-port DRAM architecture for accessing different memory partitions

Chip, multi-chip system in a method for performing a refresh of a m...

Method and system including plural memory controllers and a memory...

Electronic device having a chip stack

Memory system with extended memory density capability

Memory circuit having memory chips parallel connected to ports and...

Distributed command and address bus architecture for a memory modul...

Method and apparatus for determining a skew

Multi-die memory, apparatus and multi-die memory stack

Bus termination system and method

Memory circuit

Method of operating a memory apparatus, memory device and memory ap...

Method of operating a memory apparatus, memory device and memory ap...

Methods and articles of manufacture for operating electronic device...

Integrated circuit with wireless connection

Method and apparatus for storage device with a logic unit and metho...

High speed memory architecture

Memory system and method for transferring data therein

Memory dies for flexible use and method for configuring memory dies

Horizontal dual in-line memory modules

Method of refreshing data in a storage location based on heat dissi...

Integrated circuit, chip stack and data processing system

Memory module comprising a plurality of memory devices

Semiconductor device

Arrangement of semiconductor memory devices and semiconductor memor...

Memory device with error correction code module

Input receiver circuit

High-speed interface circuit for semiconductor memory chips and mem...

Buffer chip and method for controlling one or more memory arrangements

Semiconductor component comprising an integrated semiconductor chip...

Patents Applicationslast 30 patents

Stacking Technique for Circuit Devices

Distributed Command and Address Bus Architecture

MULTI-PORT DRAM ARCHITECTURE

Memory Dies for Flexible Use and Method for Configuring Memory Dies

MULTI MASTER DRAM ARCHITECTURE

Horizontal Dual In-line Memory Modules

ELECTRONIC DEVICE HAVING A CHIP STACK

High Speed Memory Architecture

Stacked Memory Module

Bus Termination System and Method

METHOD FOR CONTROLLING A MEMORY MODULE AND MEMORY CONTROL UNIT

Chip, Multi-Chip System in a Method for Performing a Refresh of a M...

Integrated Circuit with Improved Data Rate

Integrated circuit with wireless connection

METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICE...

DRAM with Page Access

METHOD AND APPARATUS FOR STORAGE DEVICE WITH A LOGIC UNIT AND METHO...

MEMORY DEVICE, METHOD FOR ACCESSING A MEMORY DEVICE AND METHOD FOR...

Multi-die Memory, Apparatus and Multi-die Memory Stack

Memory System With Extended Memory Density Capability

Memory Circuit

METHOD OF REFRESHING DATA IN A STORAGE LOCATION

Method and Apparatus for Determining a Skew

METHOD AND APPARATUS FOR MONITORING A MEMORY DEVICE

Method of Operating a Memory Apparatus, Memory Device and Memory Ap...

Integrated Circuit, Chip Stack and Data Processing System

Method of Operating a Memory Apparatus, Memory Device and Memory Ap...

Memory Module

SEMICONDUCTOR DEVICE

Memory System and Method for Transferring Data Therein