Hideki Komori

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual bit memory device with isolated polysilicon floating gates
- Patent number 6,713,809
- Issue date Mar 30, 2004
- Advanced Micro Devices, Inc.
- Jusuke Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for making a dual bit memory device with isolated polysilic...
- Patent number 6,573,140
- Issue date Jun 3, 2003
- Advanced Micro Devices, Inc.
- Jusuke Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High temperature oxide deposition process for fabricating an ONO fl...
- Patent number 6,265,268
- Issue date Jul 24, 2001
- Advanced Micro Devices, Inc.
- Arvind Halliyal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a bit-line in a monos device using a dual l...
- Patent number 6,248,635
- Issue date Jun 19, 2001
- Advanced Micro Devices, Inc.
- David K. Foote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an ONO dielectric by nitridation for MNOS mem...
- Patent number 6,248,628
- Issue date Jun 19, 2001
- Advanced Micro Devices
- Arvind Halliyal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a bit-line using buried diffusion isolation
- Patent number 6,242,305
- Issue date Jun 5, 2001
- Advanced Micro Devices, Inc.
- David K. Foote
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to generate a MONOS type flash cell using polycrystalline si...
- Patent number 6,218,227
- Issue date Apr 17, 2001
- Advanced Micro Devices, Inc.
- Steven K. Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated method by using high temperature oxide for top oxide and...
- Patent number 6,117,730
- Issue date Sep 12, 2000
- Advanced Micro Devices, Inc.
- Hideki Komori
- H01 - BASIC ELECTRIC ELEMENTS

Hideki Komori

Person

Patents Grantslast 30 patents

Dual bit memory device with isolated polysilicon floating gates

Process for making a dual bit memory device with isolated polysilic...

High temperature oxide deposition process for fabricating an ONO fl...

Process for fabricating a bit-line in a monos device using a dual l...

Method of fabricating an ONO dielectric by nitridation for MNOS mem...

Process for fabricating a bit-line using buried diffusion isolation

Method to generate a MONOS type flash cell using polycrystalline si...

Integrated method by using high temperature oxide for top oxide and...