Ho-Chung Huang

Person

Princeton, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical MESFET with air spaced gate electrode
- Patent number 4,570,174
- Issue date Feb 11, 1986
- The United States of America as represented by the Secretary of the Army
- Ho-Chung Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Predistortion circuit for a power amplifier
- Patent number 4,465,980
- Issue date Aug 14, 1984
- RCA Corporation
- Ho-Chung Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Monolithic voltage controlled oscillator
- Patent number 4,458,215
- Issue date Jul 3, 1984
- RCA Corporation
- Ho-Chung Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid power divider/combiner circuit
- Patent number 4,394,629
- Issue date Jul 19, 1983
- RCA Corporation
- Mahesh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating via holes in a semiconductor wafer
- Patent number 4,348,253
- Issue date Sep 7, 1982
- RCA Corporation
- Saligrama N. Subbarao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Design method for linear amplifier
- Patent number 4,246,535
- Issue date Jan 20, 1981
- RCA Corporation
- Ho-Chung Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having grid for plating contacts
- Patent number 4,202,001
- Issue date May 6, 1980
- RCA Corporation
- Walter F. Reichert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for a dual gate field-effect transistor
- Patent number 4,040,168
- Issue date Aug 9, 1977
- RCA Corporation
- Ho-Chung Huang
- H01 - BASIC ELECTRIC ELEMENTS

Ho-Chung Huang

Person

Patents Grantslast 30 patents

Vertical MESFET with air spaced gate electrode

Predistortion circuit for a power amplifier

Monolithic voltage controlled oscillator

Hybrid power divider/combiner circuit

Method for fabricating via holes in a semiconductor wafer

Design method for linear amplifier

Semiconductor device having grid for plating contacts

Fabrication method for a dual gate field-effect transistor