Hunt Hang Jiang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flip chip package unit comprising thermal protection film and assoc...
- Patent number 12,159,792
- Issue date Dec 3, 2024
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die package structure and multi-die co-packing method
- Patent number 12,002,787
- Issue date Jun 4, 2024
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package structure and integrated circuit package...
- Patent number 11,824,001
- Issue date Nov 21, 2023
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level metal wall grids array for integrated circuit packaging
- Patent number 11,670,600
- Issue date Jun 6, 2023
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3-D package structure for isolated power module and the method thereof
- Patent number 11,652,029
- Issue date May 16, 2023
- Monolithic Power Systems, Inc.
- Hunt Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package structure, integrated circuit package un...
- Patent number 11,616,017
- Issue date Mar 28, 2023
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper structures with intermetallic coating for integrated circuit...
- Patent number 10,461,052
- Issue date Oct 29, 2019
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device reducing parasitic loop inductance of system
- Patent number 10,083,930
- Issue date Sep 25, 2018
- Monolithic Power Systems, Inc.
- Huaifeng Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper structures with intermetallic coating for integrated circuit...
- Patent number 9,754,909
- Issue date Sep 5, 2017
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic flip chip packages with solder wetting pads and ass...
- Patent number 9,070,671
- Issue date Jun 30, 2015
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic flip chip packages with solder wetting pads and ass...
- Patent number 8,906,797
- Issue date Dec 9, 2014
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated power converter package with die stacking
- Patent number 8,810,013
- Issue date Aug 19, 2014
- Monolithic Power Systems, Inc.
- Eric Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die packages incorporating flip chip dies and associated pack...
- Patent number 8,604,597
- Issue date Dec 10, 2013
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated power converter package with die stacking
- Patent number 8,461,669
- Issue date Jun 11, 2013
- Monolithic Power Systems, Inc.
- Eric Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic flip chip packages with solder wetting pads and ass...
- Patent number 8,361,899
- Issue date Jan 29, 2013
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic packages with enhanced heat dissipation and methods...
- Patent number 8,283,758
- Issue date Oct 9, 2012
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sandwich structure with double-sided cooling and EMI shielding
- Patent number 8,064,202
- Issue date Nov 22, 2011
- Monolithic Power Systems, Inc.
- Jian Yin
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method and flip chip structure for power devices
- Patent number 7,999,364
- Issue date Aug 16, 2011
- Monolithic Power Systems, Inc.
- Hunt H. Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip scale package for power devices and method for making the same
- Patent number 7,944,048
- Issue date May 17, 2011
- Monolithic Power Systems, Inc.
- Hunt H. Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of embedding components in multi-layer circuit boards
- Patent number 7,513,037
- Issue date Apr 7, 2009
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Structure and method for forming a multilayered structure
- Patent number 6,869,750
- Issue date Mar 22, 2005
- Fujitsu Limited
- Lei Zhang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive composition
- Patent number 6,579,474
- Issue date Jun 17, 2003
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multilayer circuit structure build up method
- Patent number 6,428,942
- Issue date Aug 6, 2002
- Fujitsu Limited
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure of z-connected laminated substrate for high de...
- Patent number 6,326,555
- Issue date Dec 4, 2001
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for making circuit substrates and electrical assemblies
- Patent number 6,281,040
- Issue date Aug 28, 2001
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor with polymeric layer
- Patent number 6,271,107
- Issue date Aug 7, 2001
- Fujitsu Limited
- Thomas Massingill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilayer laminated substrates with high density interconnects and...
- Patent number 6,163,957
- Issue date Dec 26, 2000
- Fujitsu Limited
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer circuit substrates and electrical assemblies having con...
- Patent number 6,054,761
- Issue date Apr 25, 2000
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
3-D PACKAGE STRUCTURE FOR ISOLATED POWER MODULE AND THE METHOD THEREOF
- Publication number 20220415759
- Publication date Dec 29, 2022
- Monolithic Power Systems, Inc.
- Hunt Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP CHIP PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD
- Publication number 20220344175
- Publication date Oct 27, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP CHIP PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD
- Publication number 20220344231
- Publication date Oct 27, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD
- Publication number 20220230991
- Publication date Jul 21, 2022
- Monolithic Power Systems, Inc.
- Hunt Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE CO-PACKED MODULE AND MULTI-DIE CO-PACKING METHOD
- Publication number 20220208732
- Publication date Jun 30, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD
- Publication number 20220208731
- Publication date Jun 30, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...
- Publication number 20220208714
- Publication date Jun 30, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD
- Publication number 20220199581
- Publication date Jun 23, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...
- Publication number 20220077053
- Publication date Mar 10, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...
- Publication number 20220077054
- Publication date Mar 10, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PANEL LEVEL METAL WALL GRIDS ARRAY FOR INTEGRATED CIRCUIT PACKAGING...
- Publication number 20220077075
- Publication date Mar 10, 2022
- Chengdu Monolithic Power Systems Co., Ltd.
- Yingjiang Pu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COPPER STRUCTURES WITH INTERMETALLIC COATING FOR INTEGRATED CIRCUIT...
- Publication number 20170330853
- Publication date Nov 16, 2017
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE REDUCING PARASITIC LOOP INDUCTANCE OF SYSTEM
- Publication number 20170214319
- Publication date Jul 27, 2017
- Monolithic Power Systems, Inc.
- Huaifeng Wang
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
COPPER STRUCTURES WITH INTERMETALLIC COATING FOR INTEGRATED CIRCUIT...
- Publication number 20160351520
- Publication date Dec 1, 2016
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...
- Publication number 20150155226
- Publication date Jun 4, 2015
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...
- Publication number 20140377912
- Publication date Dec 25, 2014
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...
- Publication number 20140004662
- Publication date Jan 2, 2014
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED POWER CONVERTER PACKAGE WITH DIE STACKING
- Publication number 20130292814
- Publication date Nov 7, 2013
- Eric YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGES INCORPORATING FLIP CHIP DIES AND ASSOCIATED PACK...
- Publication number 20120273929
- Publication date Nov 1, 2012
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED DIE PACKAGES WITH FLIP-CHIP AND WIRE BONDING DIES
- Publication number 20120193772
- Publication date Aug 2, 2012
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGES WITH ENHANCED HEAT DISSIPATION AND METHODS...
- Publication number 20120153446
- Publication date Jun 21, 2012
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...
- Publication number 20120153447
- Publication date Jun 21, 2012
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Power Converter Package With Die Stacking
- Publication number 20120068320
- Publication date Mar 22, 2012
- Eric YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SANDWICH STRUCTURE WITH DOUBLE-SIDED COOLING AND EMI SHIELDING
- Publication number 20110205709
- Publication date Aug 25, 2011
- Jian Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGE WITH IMPROVED HEAT DISSIPATION
- Publication number 20100252918
- Publication date Oct 7, 2010
- Hunt H. Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip-Chip Interconnect Structure
- Publication number 20090108443
- Publication date Apr 30, 2009
- Monolithic Power Systems, Inc.
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND FLIP CHIP STRUCTURE FOR POWER DEVICES
- Publication number 20080048218
- Publication date Feb 28, 2008
- Hunt H. Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP SCALE PACKAGE FOR POWER DEVICES AND METHOD FOR MAKING THE SAME
- Publication number 20080035959
- Publication date Feb 14, 2008
- Hunt H. Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method of embedding components in multi-layer substrates
- Publication number 20050153060
- Publication date Jul 14, 2005
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Structure and method of embedding components in multi-layer substrates
- Publication number 20020175402
- Publication date Nov 28, 2002
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS

Hunt Hang Jiang

Person

Patents Grantslast 30 patents

Flip chip package unit comprising thermal protection film and assoc...

Multi-die package structure and multi-die co-packing method

Integrated circuit package structure and integrated circuit package...

Panel level metal wall grids array for integrated circuit packaging

3-D package structure for isolated power module and the method thereof

Integrated circuit package structure, integrated circuit package un...

Copper structures with intermetallic coating for integrated circuit...

Semiconductor device reducing parasitic loop inductance of system

Copper structures with intermetallic coating for integrated circuit...

Microelectronic flip chip packages with solder wetting pads and ass...

Microelectronic flip chip packages with solder wetting pads and ass...

Integrated power converter package with die stacking

Multi-die packages incorporating flip chip dies and associated pack...

Integrated power converter package with die stacking

Microelectronic flip chip packages with solder wetting pads and ass...

Microelectronic packages with enhanced heat dissipation and methods...

Sandwich structure with double-sided cooling and EMI shielding

Method and flip chip structure for power devices

Chip scale package for power devices and method for making the same

Method of embedding components in multi-layer circuit boards

Structure and method for forming a multilayered structure

Conductive composition

Multilayer circuit structure build up method

Method and structure of z-connected laminated substrate for high de...

Methods for making circuit substrates and electrical assemblies

Semiconductor with polymeric layer

Multilayer laminated substrates with high density interconnects and...

Multi-layer circuit substrates and electrical assemblies having con...

Patents Applicationslast 30 patents

3-D PACKAGE STRUCTURE FOR ISOLATED POWER MODULE AND THE METHOD THEREOF

FLIP CHIP PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD

FLIP CHIP PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD

MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD

MULTI-DIE CO-PACKED MODULE AND MULTI-DIE CO-PACKING METHOD

MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD

INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...

MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD

INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...

INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UN...

PANEL LEVEL METAL WALL GRIDS ARRAY FOR INTEGRATED CIRCUIT PACKAGING...

COPPER STRUCTURES WITH INTERMETALLIC COATING FOR INTEGRATED CIRCUIT...

SEMICONDUCTOR DEVICE REDUCING PARASITIC LOOP INDUCTANCE OF SYSTEM

COPPER STRUCTURES WITH INTERMETALLIC COATING FOR INTEGRATED CIRCUIT...

MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...

MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...

MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...

INTEGRATED POWER CONVERTER PACKAGE WITH DIE STACKING

MULTI-DIE PACKAGES INCORPORATING FLIP CHIP DIES AND ASSOCIATED PACK...

STACKED DIE PACKAGES WITH FLIP-CHIP AND WIRE BONDING DIES

MICROELECTRONIC PACKAGES WITH ENHANCED HEAT DISSIPATION AND METHODS...

MICROELECTRONIC FLIP CHIP PACKAGES WITH SOLDER WETTING PADS AND ASS...

Integrated Power Converter Package With Die Stacking

SANDWICH STRUCTURE WITH DOUBLE-SIDED COOLING AND EMI SHIELDING

MULTI-DIE PACKAGE WITH IMPROVED HEAT DISSIPATION

Flip-Chip Interconnect Structure

METHOD AND FLIP CHIP STRUCTURE FOR POWER DEVICES

CHIP SCALE PACKAGE FOR POWER DEVICES AND METHOD FOR MAKING THE SAME

Structure and method of embedding components in multi-layer substrates

Structure and method of embedding components in multi-layer substrates