Hyoung Seub Rhie

Person

Ottawa, CA

People

Patents Grantslast 30 patents

Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 12,119,411
- Issue date Oct 15, 2024
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional nonvolatile memory cell structure
- Patent number RE50124
- Issue date Sep 10, 2024
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 11,664,463
- Issue date May 30, 2023
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional nonvolatile memory cell structure with upper body...
- Patent number RE48766
- Issue date Oct 5, 2021
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 11,088,289
- Issue date Aug 10, 2021
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated erase voltage path for multiple cell substrates in nonvo...
- Patent number 10,998,048
- Issue date May 4, 2021
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 10,622,488
- Issue date Apr 14, 2020
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional nonvolatile memory cell structure with upper body...
- Patent number RE47816
- Issue date Jan 14, 2020
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
Information Patent Grant
Integrated erase voltage path for multiple cell substrates in nonvo...
- Patent number 10,460,807
- Issue date Oct 29, 2019
- Conversant Intellectual Property Mangement Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 10,403,766
- Issue date Sep 3, 2019
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with manufacturable cylindrical storage node
- Patent number 10,074,655
- Issue date Sep 11, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with manufacturable cylindrical storage node
- Patent number 9,935,110
- Issue date Apr 3, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
U-shaped common-body type cell string
- Patent number 9,893,084
- Issue date Feb 13, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Access transistor of a nonvolatile memory device and method for fab...
- Patent number 9,893,076
- Issue date Feb 13, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated erase voltage path for multiple cell substrates in nonvo...
- Patent number 9,704,580
- Issue date Jul 11, 2017
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical gate stacked NAND and row decoder for erase operation
- Patent number 9,595,336
- Issue date Mar 14, 2017
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
U-shaped common-body type cell string
- Patent number 9,595,534
- Issue date Mar 14, 2017
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Split block decoder for a nonvolatile memory device
- Patent number 9,384,838
- Issue date Jul 5, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell array with a manufacturable select gate for a nonvolatile semi...
- Patent number 9,343,152
- Issue date May 17, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure and method for manufacture of memory device with thin sil...
- Patent number 9,343,473
- Issue date May 17, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithography-friendly local read circuit for NAND flash memory devic...
- Patent number 9,318,499
- Issue date Apr 19, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM memory device with manufacturable capacitor
- Patent number 9,252,205
- Issue date Feb 2, 2016
- Coversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional nonvolatile memory cell structure with upper body...
- Patent number 9,236,394
- Issue date Jan 12, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device
- Patent number 9,236,127
- Issue date Jan 12, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
U-shaped common-body type cell string
- Patent number 9,214,235
- Issue date Dec 15, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical gate stacked NAND and row decoder for erase operation
- Patent number 9,202,578
- Issue date Dec 1, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure and method for manufacture of memory device with thin sil...
- Patent number 9,202,931
- Issue date Dec 1, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for programming non-volatile memory with junction...
- Patent number 9,030,879
- Issue date May 12, 2015
- Conversant Intellectual Property Management Incorporated
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Lithography-friendly local read circuit for NAND flash memory devic...
- Patent number 9,025,382
- Issue date May 5, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory with split substrate select gates and hierarchic...
- Patent number 9,007,834
- Issue date Apr 14, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20230268447
- Publication date Aug 24, 2023
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20210408301
- Publication date Dec 30, 2021
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...
- Publication number 20210295923
- Publication date Sep 23, 2021
- Conversant Intellectual Property Management Inc.
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20200381566
- Publication date Dec 3, 2020
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...
- Publication number 20200020401
- Publication date Jan 16, 2020
- Conversant Intellectual Property Management Inc.
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20190348544
- Publication date Nov 14, 2019
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE
- Publication number 20180175044
- Publication date Jun 21, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...
- Publication number 20180025781
- Publication date Jan 25, 2018
- Conversant Intellectual Property Management Inc.
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
U-SHAPED COMMON-BODY TYPE CELL STRING
- Publication number 20170148814
- Publication date May 25, 2017
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE
- Publication number 20170141117
- Publication date May 18, 2017
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Access Transistor of a Nonvolatile Memory Device and Method for Fab...
- Publication number 20160233224
- Publication date Aug 11, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polymer Memory
- Publication number 20160172027
- Publication date Jun 16, 2016
- Conversant Intellectual Property Management Inc.
- Ehsan Tahmasebian
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE
- Publication number 20160155744
- Publication date Jun 2, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR MANUFACTURE OF MEMORY DEVICE WITH THIN SIL...
- Publication number 20160086959
- Publication date Mar 24, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
U-SHAPED COMMON-BODY TYPE CELL STRING
- Publication number 20160064410
- Publication date Mar 3, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL GATE STACKED NAND AND ROW DECODER FOR ERASE OPERATION
- Publication number 20160049202
- Publication date Feb 18, 2016
- Conversant Intellectual Property Management Inc.
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
Lithography-friendly Local Read Circuit for NAND Flash Memory Devic...
- Publication number 20150303210
- Publication date Oct 22, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM Memory Device with Manufacturable Capacitor
- Publication number 20150221718
- Publication date Aug 6, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL NON-VOLATILE MEMORY WITH CHARGE STORAGE NODE ISOL...
- Publication number 20150214239
- Publication date Jul 30, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three Dimensional Nonvolatile Memory Cell Structure with Upper Body...
- Publication number 20150131381
- Publication date May 14, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
SPLIT BLOCK DECODER FOR A NONVOLATILE MEMORY DEVICE
- Publication number 20150117103
- Publication date Apr 30, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile Semiconductor Memory Device
- Publication number 20150103600
- Publication date Apr 16, 2015
- Conversant IP Management Inc.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
Cell Array with a Manufacturable Select Gate for a Nonvolatile Semi...
- Publication number 20150098274
- Publication date Apr 9, 2015
- CONVERSANT IP MANAGEMENT INC.
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
Vertical Gate Stacked NAND and Row Decoder for Erase Operation
- Publication number 20150092494
- Publication date Apr 2, 2015
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
Structure and Method of Manufacturing a Stacked Memory Array for Ju...
- Publication number 20150048434
- Publication date Feb 19, 2015
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
U-Shaped Common-Body Type Cell String
- Publication number 20140307508
- Publication date Oct 16, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
Lithography-friendly Local Read Circuit for NAND Flash Memory Devic...
- Publication number 20140269087
- Publication date Sep 18, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Application
Structure and Method for Manufacture of Memory Device With Thin Sil...
- Publication number 20140264541
- Publication date Sep 18, 2014
- Conversant Intellectual Property Management Inc.
- Hyoung Seub Rhie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NONVOLATILE MEMORY WITH SPLIT SUBSTRATE SELECT GATES AND HEIRARCHIC...
- Publication number 20140192596
- Publication date Jul 10, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub RHIE
- G11 - INFORMATION STORAGE
Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20140151774
- Publication date Jun 5, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE

Hyoung Seub Rhie

Person

Patents Grantslast 30 patents

NAND flash memory with vertical cell stack structure and method for...

Three-dimensional nonvolatile memory cell structure

NAND flash memory with vertical cell stack structure and method for...

Three-dimensional nonvolatile memory cell structure with upper body...

NAND flash memory with vertical cell stack structure and method for...

Integrated erase voltage path for multiple cell substrates in nonvo...

NAND flash memory with vertical cell stack structure and method for...

Three-dimensional nonvolatile memory cell structure with upper body...

Integrated erase voltage path for multiple cell substrates in nonvo...

NAND flash memory with vertical cell stack structure and method for...

Memory device with manufacturable cylindrical storage node

Memory device with manufacturable cylindrical storage node

U-shaped common-body type cell string

Access transistor of a nonvolatile memory device and method for fab...

Integrated erase voltage path for multiple cell substrates in nonvo...

Vertical gate stacked NAND and row decoder for erase operation

U-shaped common-body type cell string

Split block decoder for a nonvolatile memory device

Cell array with a manufacturable select gate for a nonvolatile semi...

Structure and method for manufacture of memory device with thin sil...

Lithography-friendly local read circuit for NAND flash memory devic...

DRAM memory device with manufacturable capacitor

Three dimensional nonvolatile memory cell structure with upper body...

Nonvolatile semiconductor memory device

U-shaped common-body type cell string

Vertical gate stacked NAND and row decoder for erase operation

Structure and method for manufacture of memory device with thin sil...

Method and system for programming non-volatile memory with junction...

Lithography-friendly local read circuit for NAND flash memory devic...

Nonvolatile memory with split substrate select gates and hierarchic...

Patents Applicationslast 30 patents

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...

INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...

INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...

MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE

INTEGRATED ERASE VOLTAGE PATH FOR MULTIPLE CELL SUBSTRATES IN NONVO...

U-SHAPED COMMON-BODY TYPE CELL STRING

MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE

Access Transistor of a Nonvolatile Memory Device and Method for Fab...

Polymer Memory

MEMORY DEVICE WITH MANUFACTURABLE CYLINDRICAL STORAGE NODE

STRUCTURE AND METHOD FOR MANUFACTURE OF MEMORY DEVICE WITH THIN SIL...

U-SHAPED COMMON-BODY TYPE CELL STRING

VERTICAL GATE STACKED NAND AND ROW DECODER FOR ERASE OPERATION

Lithography-friendly Local Read Circuit for NAND Flash Memory Devic...

DRAM Memory Device with Manufacturable Capacitor

THREE DIMENSIONAL NON-VOLATILE MEMORY WITH CHARGE STORAGE NODE ISOL...

Three Dimensional Nonvolatile Memory Cell Structure with Upper Body...

SPLIT BLOCK DECODER FOR A NONVOLATILE MEMORY DEVICE

Nonvolatile Semiconductor Memory Device

Cell Array with a Manufacturable Select Gate for a Nonvolatile Semi...

Vertical Gate Stacked NAND and Row Decoder for Erase Operation

Structure and Method of Manufacturing a Stacked Memory Array for Ju...

U-Shaped Common-Body Type Cell String

Lithography-friendly Local Read Circuit for NAND Flash Memory Devic...

Structure and Method for Manufacture of Memory Device With Thin Sil...

NONVOLATILE MEMORY WITH SPLIT SUBSTRATE SELECT GATES AND HEIRARCHIC...

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...