Igor Peidous

Person

Lake St. Louis, MO, US

People

Patents Grantslast 30 patents

Information Patent Grant
High resistivity semiconductor-on-insulator wafer and a method of m...
- Patent number 11,699,615
- Issue date Jul 11, 2023
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity single crystal silicon ingot and wafer having impr...
- Patent number 11,655,559
- Issue date May 23, 2023
- GlobalWafers Co., Ltd.
- Soubir Basak
- C30 - CRYSTAL GROWTH
Information Patent Grant
High resistivity single crystal silicon ingot and wafer having impr...
- Patent number 11,655,560
- Issue date May 23, 2023
- GlobalWafers Co., Ltd.
- Soubir Basak
- C30 - CRYSTAL GROWTH
Information Patent Grant
High resistivity SOI wafers and a method of manufacturing thereof
- Patent number 11,594,446
- Issue date Feb 28, 2023
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of preparing an isolation region in a high resistivity silic...
- Patent number 11,587,825
- Issue date Feb 21, 2023
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor on insulator structure comprising a buried high resis...
- Patent number 11,508,612
- Issue date Nov 22, 2022
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of preparing an isolation region in a high resistivity silic...
- Patent number 11,380,576
- Issue date Jul 5, 2022
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity single crystal silicon ingot and wafer having impr...
- Patent number 11,142,844
- Issue date Oct 12, 2021
- GlobalWafers Co., Ltd.
- Soubir Basak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity semiconductor-on-insulator wafer and a method of m...
- Patent number 11,139,198
- Issue date Oct 5, 2021
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity SOI wafers and a method of manufacturing thereof
- Patent number 11,081,386
- Issue date Aug 3, 2021
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for assessing semiconductor structures
- Patent number 11,081,407
- Issue date Aug 3, 2021
- GlobalWafers Co., Ltd.
- Igor Rapoport
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity SOI wafers and a method of manufacturing thereof
- Patent number 10,910,257
- Issue date Feb 2, 2021
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of preparing an isolation region in a high resistivity silic...
- Patent number 10,825,718
- Issue date Nov 3, 2020
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of depositing charge trapping polycrystalline silicon films...
- Patent number 10,784,146
- Issue date Sep 22, 2020
- GlobalWafers Co., Ltd.
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing high resistivity SOI wafers with charge tra...
- Patent number 10,672,645
- Issue date Jun 2, 2020
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of depositing charge trapping polycrystalline silicon films...
- Patent number 10,658,227
- Issue date May 19, 2020
- GlobalWafers Co., Ltd.
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor on insulator structure comprising a buried high resis...
- Patent number 10,622,247
- Issue date Apr 14, 2020
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for assessing semiconductor structures
- Patent number 10,490,464
- Issue date Nov 26, 2019
- GlobalWafers Co., Ltd.
- Igor Rapoport
- G01 - MEASURING TESTING
Information Patent Grant
High resistivity semiconductor-on-insulator wafer and a method of m...
- Patent number 10,483,152
- Issue date Nov 19, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity silicon-on-insulator substrate comprising an isola...
- Patent number 10,475,695
- Issue date Nov 12, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity silicon-on-insulator substrate comprising a charge...
- Patent number 10,468,294
- Issue date Nov 5, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing high resistivity semiconductor-on-insulator...
- Patent number 10,381,261
- Issue date Aug 13, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing high resistivity semiconductor-on-insulator...
- Patent number 10,381,260
- Issue date Aug 13, 2019
- GlobalWafers Co., Inc.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of depositing charge trapping polycrystalline silicon films...
- Patent number 10,283,402
- Issue date May 7, 2019
- GlobalWafers Co., Ltd.
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity silicon-on-insulator substrate comprising an isola...
- Patent number 10,269,617
- Issue date Apr 23, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing high resistivity SOI wafers with charge tra...
- Patent number 10,083,855
- Issue date Sep 25, 2018
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resistivity SOI wafers and a method of manufacturing thereof
- Patent number 10,079,170
- Issue date Sep 18, 2018
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for manufacturing semiconductor on insulator structure...
- Patent number 9,831,115
- Issue date Nov 28, 2017
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing high resistivity SOI wafers with charge tra...
- Patent number 9,768,056
- Issue date Sep 19, 2017
- Sunedison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...
- Publication number 20230163022
- Publication date May 25, 2023
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...
- Publication number 20230072964
- Publication date Mar 9, 2023
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...
- Publication number 20220056616
- Publication date Feb 24, 2022
- GLOBALWAFERS CO., LTD.
- Soubir Basak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...
- Publication number 20210404088
- Publication date Dec 30, 2021
- GLOBALWAFERS CO., LTD.
- Soubir Basak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFER AND A METHOD OF M...
- Publication number 20210384070
- Publication date Dec 9, 2021
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
- Publication number 20210327750
- Publication date Oct 21, 2021
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...
- Publication number 20210035855
- Publication date Feb 4, 2021
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...
- Publication number 20210013091
- Publication date Jan 14, 2021
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
- Publication number 20210005507
- Publication date Jan 7, 2021
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...
- Publication number 20200216975
- Publication date Jul 9, 2020
- GlobalWafers Co., Ltd
- Soubir Basak
- C30 - CRYSTAL GROWTH
Information Patent Application
METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...
- Publication number 20200126848
- Publication date Apr 23, 2020
- GLOBALWAFERS CO., LTD.
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...
- Publication number 20200126846
- Publication date Apr 23, 2020
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES
- Publication number 20200058566
- Publication date Feb 20, 2020
- GLOBALWAFERS CO., LTD.
- Igor Rapoport
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...
- Publication number 20190214294
- Publication date Jul 11, 2019
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFER AND A METHOD OF M...
- Publication number 20190139818
- Publication date May 9, 2019
- GlobalWafers Co., Ltd.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...
- Publication number 20190096745
- Publication date Mar 28, 2019
- GLOBALWAFERS CO., LTD.
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...
- Publication number 20190080957
- Publication date Mar 14, 2019
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE...
- Publication number 20190027397
- Publication date Jan 24, 2019
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING HIGH RESISTIVITY SOI WAFERS WITH CHARGE TRA...
- Publication number 20190013235
- Publication date Jan 10, 2019
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
- Publication number 20180350661
- Publication date Dec 6, 2018
- GLOBALWAFERS CO., LTD.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR...
- Publication number 20180277421
- Publication date Sep 27, 2018
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...
- Publication number 20180233400
- Publication date Aug 16, 2018
- SunEdison Semiconductor Limited (UEN201334164H)
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES
- Publication number 20180233420
- Publication date Aug 16, 2018
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Rapoport
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...
- Publication number 20180174892
- Publication date Jun 21, 2018
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...
- Publication number 20170372946
- Publication date Dec 28, 2017
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING HIGH RESISTIVITY SOI WAFERS WITH CHARGE TRA...
- Publication number 20170365506
- Publication date Dec 21, 2017
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
A METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULAT...
- Publication number 20170338143
- Publication date Nov 23, 2017
- SunEdison Semiconductor Limited (UEN201334 164)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SEMICONDUCTOR-IN-INSULATOR WAFER AND A METHOD OF M...
- Publication number 20170316968
- Publication date Nov 2, 2017
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FLOW FOR MANUFACTURING SEMICONDUCTOR ON INSULATOR STRUCTURE...
- Publication number 20170243781
- Publication date Aug 24, 2017
- SunEdison Semiconductor Limited (UEN201334164H)
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
- Publication number 20160351437
- Publication date Dec 1, 2016
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS

Igor Peidous

Person

Patents Grantslast 30 patents

High resistivity semiconductor-on-insulator wafer and a method of m...

High resistivity single crystal silicon ingot and wafer having impr...

High resistivity single crystal silicon ingot and wafer having impr...

High resistivity SOI wafers and a method of manufacturing thereof

Method of preparing an isolation region in a high resistivity silic...

Semiconductor on insulator structure comprising a buried high resis...

Method of preparing an isolation region in a high resistivity silic...

High resistivity single crystal silicon ingot and wafer having impr...

High resistivity semiconductor-on-insulator wafer and a method of m...

High resistivity SOI wafers and a method of manufacturing thereof

Methods for assessing semiconductor structures

High resistivity SOI wafers and a method of manufacturing thereof

Method of preparing an isolation region in a high resistivity silic...

Method of depositing charge trapping polycrystalline silicon films...

Method of manufacturing high resistivity SOI wafers with charge tra...

Method of depositing charge trapping polycrystalline silicon films...

Semiconductor on insulator structure comprising a buried high resis...

Methods for assessing semiconductor structures

High resistivity semiconductor-on-insulator wafer and a method of m...

High resistivity silicon-on-insulator substrate comprising an isola...

High resistivity silicon-on-insulator substrate comprising a charge...

Method of manufacturing high resistivity semiconductor-on-insulator...

Method of manufacturing high resistivity semiconductor-on-insulator...

Method of depositing charge trapping polycrystalline silicon films...

High resistivity silicon-on-insulator substrate comprising an isola...

Method of manufacturing high resistivity SOI wafers with charge tra...

High resistivity SOI wafers and a method of manufacturing thereof

Process flow for manufacturing semiconductor on insulator structure...

Method of manufacturing high resistivity SOI wafers with charge tra...

Patents Applicationslast 30 patents

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...

SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...

HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...

HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...

HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFER AND A METHOD OF M...

HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF

METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...

METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...

HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF

HIGH RESISTIVITY SINGLE CRYSTAL SILICON INGOT AND WAFER HAVING IMPR...

METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...

SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...

METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES

METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILIC...

HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFER AND A METHOD OF M...

METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...

SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESIS...

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE...

METHOD OF MANUFACTURING HIGH RESISTIVITY SOI WAFERS WITH CHARGE TRA...

HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF

METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR...

METHOD OF DEPOSITING CHARGE TRAPPING POLYCRYSTALLINE SILICON FILMS...

METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLA...

METHOD OF MANUFACTURING HIGH RESISTIVITY SOI WAFERS WITH CHARGE TRA...

A METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULAT...

HIGH RESISTIVITY SEMICONDUCTOR-IN-INSULATOR WAFER AND A METHOD OF M...

PROCESS FLOW FOR MANUFACTURING SEMICONDUCTOR ON INSULATOR STRUCTURE...

HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF