Israel A. Wagner

Person

Zikhron-Yaakov, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Clock gating circuit for avoiding out-of-spec clock operations in s...
- Patent number 12,158,771
- Issue date Dec 3, 2024
- International Business Machines Corporation
- Israel A. Wagner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive keeper for supply-robust circuits
- Patent number 11,876,517
- Issue date Jan 16, 2024
- International Business Machines Corporation
- Israel A. Wagner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power reduction in very large-scale integration (VLSI) systems
- Patent number 11,675,944
- Issue date Jun 13, 2023
- International Business Machines Corporation
- Lior Arie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analysis of signal transitions in feedback circuits
- Patent number 11,176,299
- Issue date Nov 16, 2021
- International Business Machines Corporation
- Israel A. Wagner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Locating failures in memory with redundancy
- Patent number 10,825,543
- Issue date Nov 3, 2020
- International Business Machines Corporation
- Hezi Shalom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient dynamic capacitor circuit for noise reduction in VLS...
- Patent number 10,756,707
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Israel A. Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-timed, log-space, voltage-controlled delay line
- Patent number 9,825,619
- Issue date Nov 21, 2017
- International Business Machines Corporation
- Lior Arie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Structure for static random access memory
- Patent number 9,465,905
- Issue date Oct 11, 2016
- International Business Machines Corporation
- Lior Arie
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure for static random access memory
- Patent number 9,466,358
- Issue date Oct 11, 2016
- International Business Machines Corporation
- Lior Arie
- G11 - INFORMATION STORAGE
Information Patent Grant
Direct memory based ring oscillator (DMRO) for on-chip evaluation o...
- Patent number 9,343,182
- Issue date May 17, 2016
- International Business Machines Corporation
- Noam Jungmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage comparator circuit and usage thereof
- Patent number 9,299,458
- Issue date Mar 29, 2016
- International Business Machines Corporation
- Lior Binyamini
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage comparator circuit and usage thereof
- Patent number 9,263,096
- Issue date Feb 16, 2016
- International Business Machines Corporation
- Lior Binyamini
- G11 - INFORMATION STORAGE
Information Patent Grant
Latched ring oscillator device for on-chip measurement of clock to...
- Patent number 8,330,548
- Issue date Dec 11, 2012
- International Business Machines Corporation
- Israel A. Wagner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic circuit and method of logic circuit design
- Patent number 8,161,427
- Issue date Apr 17, 2012
- Technion Research and Development Foundation Ltd.
- Arkadiy Morgenshtein
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and mechanism to reduce current variation in a current refer...
- Patent number 7,994,846
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Oded Katz
- G05 - CONTROLLING REGULATING
Information Patent Grant
System, method and device of generating a random value
- Patent number 7,962,539
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Assaf Barak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential approach to current-mode chaos based random number gen...
- Patent number 7,941,471
- Issue date May 10, 2011
- International Business Machines Corporation
- Oded Katz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reduced duty cycle distortion using controlled body device
- Patent number 7,825,693
- Issue date Nov 2, 2010
- International Business Machines Corporation
- Oded Katz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic circuit and method of logic circuit design
- Patent number 7,716,625
- Issue date May 11, 2010
- Technion Research and Development Foundation Ltd.
- Arkadiy Morgenshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuit and method of logic circuit design
- Patent number 7,345,511
- Issue date Mar 18, 2008
- Technion Research and Development Foundation Ltd.
- Arkadiy Morgenshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory free method of region filling
- Patent number 7,215,341
- Issue date May 8, 2007
- Technion Research and Development Foundation Ltd.
- Vladimi Yanovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power-scalable asynchronous architecture for a wave-pipelined analo...
- Patent number 6,744,395
- Issue date Jun 1, 2004
- International Business Machines Corporation
- Yevgeny Perelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip histogram testing
- Patent number 6,658,368
- Issue date Dec 2, 2003
- International Business Machines Corporation
- Israel Wagner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexer for asynchronous data
- Patent number 6,577,649
- Issue date Jun 10, 2003
- International Business Machines Corporation
- Moshe Leibowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Charge cancellation circuit for switched capacitor applications
- Patent number 6,566,934
- Issue date May 20, 2003
- International Business Machines Corporation
- David Goren
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
One layer spider interconnect
- Patent number 6,420,663
- Issue date Jul 16, 2002
- International Business Machines Corporation
- Michael Zelikson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for robust clocking schemes for logic circuits
- Patent number 5,894,419
- Issue date Apr 13, 1999
- International Business Machines Corporation
- Tiberiu Carol Galambos
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MODIFYING NETLISTS FOR DEVICE CHANGES IN IC DESIGNS
- Publication number 20250013811
- Publication date Jan 9, 2025
- International Business Machines Corporation
- Itay ISRAELI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOST CAPACITOR SELECTIVELY AND CONCURRENTLY PROVIDING VOLTAGE BOOS...
- Publication number 20240355365
- Publication date Oct 24, 2024
- International Business Machines Corporation
- Noam Jungmann
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GATING CIRCUIT FOR AVOIDING OUT-OF-SPEC CLOCK OPERATIONS IN S...
- Publication number 20240329684
- Publication date Oct 3, 2024
- International Business Machines Corporation
- Israel A. WAGNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE KEEPER FOR SUPPLY-ROBUST CIRCUITS
- Publication number 20230261660
- Publication date Aug 17, 2023
- International Business Machines Corporation
- Israel A. Wagner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER REDUCTION IN VERY LARGE-SCALE INTEGRATION (VLSI) SYSTEMS
- Publication number 20220366110
- Publication date Nov 17, 2022
- International Business Machines Corporation
- Lior Arie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE SRAM MEMORY CONTROL
- Publication number 20220236905
- Publication date Jul 28, 2022
- International Business Machines Corporation
- Israel A. Wagner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCATING FAILURES IN MEMORY WITH REDUNDANCY
- Publication number 20200035322
- Publication date Jan 30, 2020
- International Business Machines Corporation
- HEZI SHALOM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE COMPARATOR CIRCUIT AND USAGE THEREOF
- Publication number 20160071551
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Lior Binyamini
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE COMPARATOR CIRCUIT AND USAGE THEREOF
- Publication number 20160071617
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Lior Binyamini
- G11 - INFORMATION STORAGE
Information Patent Application
DIRECT MEMORY BASED RING OSCILLATOR (DMRO) FOR ON-CHIP EVALUATION O...
- Publication number 20160055921
- Publication date Feb 25, 2016
- International Business Machines Corporation
- Noam Jungmann
- G11 - INFORMATION STORAGE
Information Patent Application
DIRECT MEMORY BASED RING OSCILLATOR (DMRO) FOR ON-CHIP EVALUATION O...
- Publication number 20150015274
- Publication date Jan 15, 2015
- International Business Machines Corporation
- Noam Jungmann
- G01 - MEASURING TESTING
Information Patent Application
LOGIC CIRCUIT AND METHOD OF LOGIC CIRCUIT DESIGN
- Publication number 20120126853
- Publication date May 24, 2012
- Technion Research & Development Foundation Ltd.
- Arkadiy MORGENSHTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATCHED RING OSCILLATOR DEVICE FOR ON-CHIP MEASUREMENT OF CLOCK TO...
- Publication number 20120044024
- Publication date Feb 23, 2012
- International Business Machines Corporation
- Israel A. WAGNER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Mechanism to Reduce Current Variation in a Current Refer...
- Publication number 20100289563
- Publication date Nov 18, 2010
- International Business Machines Corporation
- Oded Katz
- G05 - CONTROLLING REGULATING
Information Patent Application
LOGIC CIRCUIT AND METHOD OF LOGIC CIRCUIT DESIGN
- Publication number 20100194439
- Publication date Aug 5, 2010
- Technion Research & Development Foundation Ltd.
- Arkadiy MORGENSHTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Method and Device of Generating a Random Value
- Publication number 20080270502
- Publication date Oct 30, 2008
- Assaf Barak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Differential Approach to Current-Mode Chaos Based Random Number Gen...
- Publication number 20080183785
- Publication date Jul 31, 2008
- Oded Katz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logic circuit and method of logic circuit design
- Publication number 20070261015
- Publication date Nov 8, 2007
- Technion Research & Development Foundation Ltd.
- Arkadiy Morgenshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory free method of region filling
- Publication number 20040135792
- Publication date Jul 15, 2004
- Vladimir Yanovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logic circuit and method of logic circuit design
- Publication number 20040130349
- Publication date Jul 8, 2004
- Arkadiy Morgenshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER-SCALABLE ASYNCHRONOUS ARCHITECTURE FOR A WAVE-PIPELINED ANALO...
- Publication number 20040100400
- Publication date May 27, 2004
- International Business Machines Corporation
- Yevgeny Perelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
On-chip histogram testing
- Publication number 20020138231
- Publication date Sep 26, 2002
- International Business Machines Corporation
- Israel Wagner
- G01 - MEASURING TESTING

Israel A. Wagner

Person

Patents Grantslast 30 patents

Clock gating circuit for avoiding out-of-spec clock operations in s...

Adaptive keeper for supply-robust circuits

Power reduction in very large-scale integration (VLSI) systems

Analysis of signal transitions in feedback circuits

Locating failures in memory with redundancy

Area-efficient dynamic capacitor circuit for noise reduction in VLS...

Self-timed, log-space, voltage-controlled delay line

Structure for static random access memory

Structure for static random access memory

Direct memory based ring oscillator (DMRO) for on-chip evaluation o...

Voltage comparator circuit and usage thereof

Voltage comparator circuit and usage thereof

Latched ring oscillator device for on-chip measurement of clock to...

Logic circuit and method of logic circuit design

Method and mechanism to reduce current variation in a current refer...

System, method and device of generating a random value

Differential approach to current-mode chaos based random number gen...

Reduced duty cycle distortion using controlled body device

Logic circuit and method of logic circuit design

Logic circuit and method of logic circuit design

Memory free method of region filling

Power-scalable asynchronous architecture for a wave-pipelined analo...

On-chip histogram testing

Multiplexer for asynchronous data

Charge cancellation circuit for switched capacitor applications

One layer spider interconnect

System and method for robust clocking schemes for logic circuits

Patents Applicationslast 30 patents

MODIFYING NETLISTS FOR DEVICE CHANGES IN IC DESIGNS

BOOST CAPACITOR SELECTIVELY AND CONCURRENTLY PROVIDING VOLTAGE BOOS...

CLOCK GATING CIRCUIT FOR AVOIDING OUT-OF-SPEC CLOCK OPERATIONS IN S...

ADAPTIVE KEEPER FOR SUPPLY-ROBUST CIRCUITS

POWER REDUCTION IN VERY LARGE-SCALE INTEGRATION (VLSI) SYSTEMS

ADAPTIVE SRAM MEMORY CONTROL

LOCATING FAILURES IN MEMORY WITH REDUNDANCY

VOLTAGE COMPARATOR CIRCUIT AND USAGE THEREOF

VOLTAGE COMPARATOR CIRCUIT AND USAGE THEREOF

DIRECT MEMORY BASED RING OSCILLATOR (DMRO) FOR ON-CHIP EVALUATION O...

DIRECT MEMORY BASED RING OSCILLATOR (DMRO) FOR ON-CHIP EVALUATION O...

LOGIC CIRCUIT AND METHOD OF LOGIC CIRCUIT DESIGN

LATCHED RING OSCILLATOR DEVICE FOR ON-CHIP MEASUREMENT OF CLOCK TO...

Method and Mechanism to Reduce Current Variation in a Current Refer...

LOGIC CIRCUIT AND METHOD OF LOGIC CIRCUIT DESIGN

System, Method and Device of Generating a Random Value

Differential Approach to Current-Mode Chaos Based Random Number Gen...

Logic circuit and method of logic circuit design

Memory free method of region filling

Logic circuit and method of logic circuit design

POWER-SCALABLE ASYNCHRONOUS ARCHITECTURE FOR A WAVE-PIPELINED ANALO...

On-chip histogram testing