J . Thomas Pawlowski

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Buses for pattern-recognition processors
- Patent number 12,067,767
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory having internal processors and data communication methods in...
- Patent number 11,914,530
- Issue date Feb 27, 2024
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for memory address translation during block...
- Patent number 11,625,321
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable memory system protocol supporting programmable number of l...
- Patent number 11,531,472
- Issue date Dec 20, 2022
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable memory system protocol supporting programmable number of l...
- Patent number 11,526,280
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving efficiencies of a memory system
- Patent number 11,461,017
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for packing data in a scalable memory system pr...
- Patent number 11,461,019
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory having internal processors and data communication methods in...
- Patent number 11,403,240
- Issue date Aug 2, 2022
- Micron Technology, Inc.
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Progressive length error control code
- Patent number 11,256,570
- Issue date Feb 22, 2022
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for packing data in a scalable memory system pr...
- Patent number 11,194,480
- Issue date Dec 7, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buses for pattern-recognition processors
- Patent number 11,023,758
- Issue date Jun 1, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable memory system protocol supporting programmable number of l...
- Patent number 11,003,363
- Issue date May 11, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for packing data in a scalable memory system pr...
- Patent number 10,921,995
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Progressive length error control code
- Patent number 10,838,813
- Issue date Nov 17, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for migrating information stored in memory using an interme...
- Patent number 10,817,412
- Issue date Oct 27, 2020
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Progressive length error control code
- Patent number 10,733,050
- Issue date Aug 4, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving efficiencies of a memory system
- Patent number 10,572,164
- Issue date Feb 25, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for packing data in a scalable memory system pr...
- Patent number 10,540,104
- Issue date Jan 21, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Progressive length error control code
- Patent number 10,496,478
- Issue date Dec 3, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Progressive length error control code
- Patent number 10,409,680
- Issue date Sep 10, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power-down of a block of a pattern-recognition processor
- Patent number 10,152,113
- Issue date Dec 11, 2018
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for reordering packet transmissions in a scalab...
- Patent number 10,146,457
- Issue date Dec 4, 2018
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device command receiving and decoding methods
- Patent number 10,127,969
- Issue date Nov 13, 2018
- Micron Technology, Inc.
- Scott Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for adaptive control of memory using an ada...
- Patent number 10,042,750
- Issue date Aug 7, 2018
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for pre-fetching and write-back for a segme...
- Patent number 10,019,369
- Issue date Jul 10, 2018
- Micron Technology, Inc.
- David Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for throttling packet transmission in a scalabl...
- Patent number 9,823,864
- Issue date Nov 21, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for packing data in a scalable memory system pr...
- Patent number 9,747,048
- Issue date Aug 29, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for transmitting packets in a scalable memory s...
- Patent number 9,733,847
- Issue date Aug 15, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for improving efficiencies of a memory system
- Patent number 9,696,920
- Issue date Jul 4, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for segmenting data structures in a memory system
- Patent number 9,690,502
- Issue date Jun 27, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...
- Publication number 20240184724
- Publication date Jun 6, 2024
- Lodestar Licensing Group, LLC
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...
- Publication number 20220350760
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUSES FOR PATTERN-RECOGNITION PROCESSORS
- Publication number 20210287027
- Publication date Sep 16, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...
- Publication number 20210247915
- Publication date Aug 12, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...
- Publication number 20210247914
- Publication date Aug 12, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...
- Publication number 20210141541
- Publication date May 13, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR MEMORY ADDRESS TRANSLATION DURING BLOCK...
- Publication number 20210042219
- Publication date Feb 11, 2021
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRESSIVE LENGTH ERROR CONTROL CODE
- Publication number 20210034461
- Publication date Feb 4, 2021
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM
- Publication number 20200150884
- Publication date May 14, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...
- Publication number 20200097190
- Publication date Mar 26, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...
- Publication number 20200097191
- Publication date Mar 26, 2020
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRESSIVE LENGTH ERROR CONTROL CODE
- Publication number 20190361774
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRESSIVE LENGTH ERROR CONTROL CODE
- Publication number 20190361776
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRESSIVE LENGTH ERROR CONTROL CODE
- Publication number 20190361777
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUSES FOR PATTERN-RECOGNITION PROCESSORS
- Publication number 20190147278
- Publication date May 16, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...
- Publication number 20190102095
- Publication date Apr 4, 2019
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR ADAPTIVE CONTROL OF MEMORY
- Publication number 20180322039
- Publication date Nov 8, 2018
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...
- Publication number 20170329545
- Publication date Nov 16, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM
- Publication number 20170300382
- Publication date Oct 19, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE COMMAND RECEIVING AND DECODING METHODS
- Publication number 20170186475
- Publication date Jun 29, 2017
- Micron Technology, Inc.
- Scott Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REORDERING PACKET TRANSMISSIONS IN A SCALAB...
- Publication number 20170168728
- Publication date Jun 15, 2017
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR PRE-FETCHING AND WRITE-BACK FOR A SEGME...
- Publication number 20170161197
- Publication date Jun 8, 2017
- Micron Technology, Inc.
- David Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...
- Publication number 20170024337
- Publication date Jan 26, 2017
- Micron Technology, Inc.
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE TO REDUCE POWER CONSUMPTION MANAGMENT OF A PATTER...
- Publication number 20160320829
- Publication date Nov 3, 2016
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE COMMAND DECODING SYSTEM AND MEMORY DEVICE AND PROCESS...
- Publication number 20160189763
- Publication date Jun 30, 2016
- Micron Technology, Inc.
- Scott Smith
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR TRANSMITTING PACKETS IN A SCALABLE MEMORY S...
- Publication number 20150347015
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REORDERING PACKET TRANSMISSIONS IN A SCALAB...
- Publication number 20150347048
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM
- Publication number 20150347225
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR THROTTLING PACKET TRANSMISSION IN A SCALABL...
- Publication number 20150350082
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- J. Thomas Pawlowski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR SEGMENTING DATA STRUCTURES IN A MEMORY SYSTEM
- Publication number 20150347019
- Publication date Dec 3, 2015
- Micron Technology, Inc.
- J. Thomas Pawlowski
- G06 - COMPUTING CALCULATING COUNTING

J . Thomas Pawlowski

Person

Patents Grantslast 30 patents

Buses for pattern-recognition processors

Memory having internal processors and data communication methods in...

Apparatuses and methods for memory address translation during block...

Scalable memory system protocol supporting programmable number of l...

Scalable memory system protocol supporting programmable number of l...

Systems and methods for improving efficiencies of a memory system

Systems and methods for packing data in a scalable memory system pr...

Memory having internal processors and data communication methods in...

Progressive length error control code

Systems and methods for packing data in a scalable memory system pr...

Buses for pattern-recognition processors

Scalable memory system protocol supporting programmable number of l...

Systems and methods for packing data in a scalable memory system pr...

Progressive length error control code

Methods for migrating information stored in memory using an interme...

Progressive length error control code

Systems and methods for improving efficiencies of a memory system

Systems and methods for packing data in a scalable memory system pr...

Progressive length error control code

Progressive length error control code

Dynamic power-down of a block of a pattern-recognition processor

Systems and methods for reordering packet transmissions in a scalab...

Memory device command receiving and decoding methods

Apparatuses and methods for adaptive control of memory using an ada...

Apparatuses and methods for pre-fetching and write-back for a segme...

Systems and methods for throttling packet transmission in a scalabl...

Systems and methods for packing data in a scalable memory system pr...

Systems and methods for transmitting packets in a scalable memory s...

Systems and methods for improving efficiencies of a memory system

Systems and methods for segmenting data structures in a memory system

Patents Applicationslast 30 patents

MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...

MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...

BUSES FOR PATTERN-RECOGNITION PROCESSORS

SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...

SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...

SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...

APPARATUSES AND METHODS FOR MEMORY ADDRESS TRANSLATION DURING BLOCK...

PROGRESSIVE LENGTH ERROR CONTROL CODE

SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM

SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...

SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...

PROGRESSIVE LENGTH ERROR CONTROL CODE

PROGRESSIVE LENGTH ERROR CONTROL CODE

PROGRESSIVE LENGTH ERROR CONTROL CODE

BUSES FOR PATTERN-RECOGNITION PROCESSORS

SCALABLE MEMORY SYSTEM PROTOCOL SUPPORTING PROGRAMMABLE NUMBER OF L...

APPARATUSES AND METHODS FOR ADAPTIVE CONTROL OF MEMORY

SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PR...

SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM

MEMORY DEVICE COMMAND RECEIVING AND DECODING METHODS

SYSTEMS AND METHODS FOR REORDERING PACKET TRANSMISSIONS IN A SCALAB...

APPARATUSES AND METHODS FOR PRE-FETCHING AND WRITE-BACK FOR A SEGME...

MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN...

METHOD AND DEVICE TO REDUCE POWER CONSUMPTION MANAGMENT OF A PATTER...

MEMORY DEVICE COMMAND DECODING SYSTEM AND MEMORY DEVICE AND PROCESS...

SYSTEMS AND METHODS FOR TRANSMITTING PACKETS IN A SCALABLE MEMORY S...

SYSTEMS AND METHODS FOR REORDERING PACKET TRANSMISSIONS IN A SCALAB...

SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM

SYSTEMS AND METHODS FOR THROTTLING PACKET TRANSMISSION IN A SCALABL...

SYSTEMS AND METHODS FOR SEGMENTING DATA STRUCTURES IN A MEMORY SYSTEM