Jack M. Higman

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Three-port memory cell and array for in-memory computing
- Patent number 10,964,362
- Issue date Mar 30, 2021
- Marvell Asia Pte, Ltd.
- Zhewei Jiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual port static random access memory cell
- Patent number 8,638,592
- Issue date Jan 28, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Sayeed A. Badrudduza
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with edge-adjacent devices having reactance values
- Patent number 8,431,970
- Issue date Apr 30, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Ertugrul Demircan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit memory having assisted access and method therefor
- Patent number 8,315,117
- Issue date Nov 20, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port static random access memory cell layout
- Patent number 8,183,639
- Issue date May 22, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Pierre Malinge
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with read cycle write back
- Patent number 8,009,489
- Issue date Aug 30, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory operation testing
- Patent number 7,852,692
- Issue date Dec 14, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with capacitor and/or inductor and method of m...
- Patent number 7,820,520
- Issue date Oct 26, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Ertugrul Demircan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cells with lower power consumption during a write operation
- Patent number 7,609,541
- Issue date Oct 27, 2009
- FREESCALE SEMICONDUCTOR, INC.
- James David Burnett
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for adjusting an operating parameter of an int...
- Patent number 7,483,327
- Issue date Jan 27, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-port SRAM having improved write operation
- Patent number 7,440,313
- Issue date Oct 21, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Glenn C. Abeln
- G11 - INFORMATION STORAGE
Information Patent Grant
Primitive cell method for front end physical design
- Patent number 7,386,821
- Issue date Jun 10, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Jack M. Higman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic device and method for operating a memory circuit
- Patent number 7,336,533
- Issue date Feb 26, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Bradford L. Hunter
- G11 - INFORMATION STORAGE
Information Patent Grant
Monolithic semiconductor body with convex structure
- Patent number 5,539,216
- Issue date Jul 23, 1996
- Motorola, Inc.
- Bich-Yen Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of making EEPROM memory device having a sidewall spacer flo...
- Patent number 5,494,838
- Issue date Feb 27, 1996
- Motorola, Inc.
- Kuo-Tung Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM memory device having a sidewall spacer floating gate electro...
- Patent number 5,422,504
- Issue date Jun 6, 1995
- Motorola Inc.
- Kuo-Tung Chang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
THREE-PORT MEMORY CELL AND ARRAY FOR IN-MEMORY COMPUTING
- Publication number 20200342921
- Publication date Oct 29, 2020
- Marvell International Ltd.
- Zhewei Jiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL PORT STATIC RANDOM ACCESS MEMORY CELL
- Publication number 20130064003
- Publication date Mar 14, 2013
- Sayeed A. Badrudduza
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL PORT STATIC RANDOM ACCESS MEMORY CELL LAYOUT
- Publication number 20120086082
- Publication date Apr 12, 2012
- PIERRE MALINGE
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF M...
- Publication number 20110001214
- Publication date Jan 6, 2011
- FREESCALE SEMICONDUCTOR, INC.
- ERTUGRUL DEMIRCAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH READ CYCLE WRITE BACK
- Publication number 20100302837
- Publication date Dec 2, 2010
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT MEMORY HAVING ASSISTED ACCESS AND METHOD THEREFOR
- Publication number 20100246298
- Publication date Sep 30, 2010
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY OPERATION TESTING
- Publication number 20090323446
- Publication date Dec 31, 2009
- SHAYAN ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF M...
- Publication number 20080230873
- Publication date Sep 25, 2008
- Ertugrul Demircan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELLS WITH LOWER POWER CONSUMPTION DURING A WRITE OPERATION
- Publication number 20080158938
- Publication date Jul 3, 2008
- James David Burnett
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION
- Publication number 20080117665
- Publication date May 22, 2008
- Glenn C. Abeln
- G11 - INFORMATION STORAGE
Information Patent Application
PRIMITIVE CELL METHOD FOR FRONT END PHYSICAL DESIGN
- Publication number 20080005717
- Publication date Jan 3, 2008
- Jack M. Higman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for adjusting an operating parameter of an int...
- Publication number 20070220388
- Publication date Sep 20, 2007
- Qadeer A. Quereshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic device and method for operating a memory circuit
- Publication number 20070171713
- Publication date Jul 26, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Bradford L. Hunter
- G11 - INFORMATION STORAGE

Jack M. Higman

Person

Patents Grantslast 30 patents

Three-port memory cell and array for in-memory computing

Dual port static random access memory cell

Integrated circuits with edge-adjacent devices having reactance values

Integrated circuit memory having assisted access and method therefor

Dual port static random access memory cell layout

Memory with read cycle write back

Memory operation testing

Semiconductor device with capacitor and/or inductor and method of m...

Memory cells with lower power consumption during a write operation

Apparatus and method for adjusting an operating parameter of an int...

Two-port SRAM having improved write operation

Primitive cell method for front end physical design

Electronic device and method for operating a memory circuit

Monolithic semiconductor body with convex structure

Process of making EEPROM memory device having a sidewall spacer flo...

EEPROM memory device having a sidewall spacer floating gate electro...

Patents Applicationslast 30 patents

THREE-PORT MEMORY CELL AND ARRAY FOR IN-MEMORY COMPUTING

DUAL PORT STATIC RANDOM ACCESS MEMORY CELL

DUAL PORT STATIC RANDOM ACCESS MEMORY CELL LAYOUT

SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF M...

MEMORY WITH READ CYCLE WRITE BACK

INTEGRATED CIRCUIT MEMORY HAVING ASSISTED ACCESS AND METHOD THEREFOR

MEMORY OPERATION TESTING

SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF M...

MEMORY CELLS WITH LOWER POWER CONSUMPTION DURING A WRITE OPERATION

TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION

PRIMITIVE CELL METHOD FOR FRONT END PHYSICAL DESIGN

Apparatus and method for adjusting an operating parameter of an int...

Electronic device and method for operating a memory circuit