Jai P. Bansal

Person

Manassas, VA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable transceiver circuit
- Patent number 8,975,920
- Issue date Mar 10, 2015
- BAE Systems Information and Electronic Systems Integration Inc.
- Jai P. Bansal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for designing structured ASICs in silicon processes with thr...
- Patent number 7,895,559
- Issue date Feb 22, 2011
- BAE System Information and Electric Systems Integration Inc.
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for designing structured ASICS in silicon processes with thr...
- Patent number 7,418,692
- Issue date Aug 26, 2008
- BAE Systems Information and Electronic Systems Integration Inc.
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High voltage tolerant off chip driver circuit
- Patent number 7,239,177
- Issue date Jul 3, 2007
- BAE Systems Information and Electronic Systems Integration Inc.
- Jai P. Bansal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for providing a cell-based ASIC device with multiple power s...
- Patent number 6,944,843
- Issue date Sep 13, 2005
- BAE Systems, Information and Electronic Systems Integration, Inc.
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate array core cell for VLSI ASIC devices
- Patent number 6,765,245
- Issue date Jul 20, 2004
- BAE Systems Information and Electronic Systems Integration Inc.
- Jai P. Bansal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process to personalize master slice wafers and fabricate high densi...
- Patent number 5,858,817
- Issue date Jan 12, 1999
- Lockheed Martin Corporation
- Jai P. Bansal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single event upset hardened CMOS latch circuit
- Patent number 5,504,703
- Issue date Apr 2, 1996
- Loral Federal Systems Company
- Jai P. Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure of stacked, complementary MOS field effect transistor cir...
- Patent number 4,555,721
- Issue date Nov 26, 1985
- International Business Machines Corporation
- Jai P. Bansal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabrication of stacked, complementary MOS field effect...
- Patent number 4,467,518
- Issue date Aug 28, 1984
- IBM Corporation
- Jai P. Bansal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Latent image ram cell
- Patent number 4,418,401
- Issue date Nov 29, 1983
- IBM Corporation
- Jai P. Bansal
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMABLE TRANSCEIVER CIRCUIT
- Publication number 20130207689
- Publication date Aug 15, 2013
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
- JAI P. BANSAL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for designing structured ASICs in silicon processes with thr...
- Publication number 20080282216
- Publication date Nov 13, 2008
- BAE Systems Information and Electronic system Integration, Inc.
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for designing structured ASICS in silicon processes with thr...
- Publication number 20060015828
- Publication date Jan 19, 2006
- BAE Systems Information and Electronic Systems Integration, Inc.
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High voltage tolerant off chip driver circuit
- Publication number 20050275432
- Publication date Dec 15, 2005
- BAE Systems Information and Electronic Systems Integration, Inc.
- Jai P. Bansal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for providing a cell-based ASIC device with multiple power s...
- Publication number 20050034095
- Publication date Feb 10, 2005
- BAE Systems
- Jai P. Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Gate array core cell for VLSI ASIC devices
- Publication number 20030178648
- Publication date Sep 25, 2003
- Jai P. Bansal
- H01 - BASIC ELECTRIC ELEMENTS

Jai P. Bansal

Person

Patents Grantslast 30 patents

Programmable transceiver circuit

Method for designing structured ASICs in silicon processes with thr...

Method for designing structured ASICS in silicon processes with thr...

High voltage tolerant off chip driver circuit

Method for providing a cell-based ASIC device with multiple power s...

Gate array core cell for VLSI ASIC devices

Process to personalize master slice wafers and fabricate high densi...

Single event upset hardened CMOS latch circuit

Structure of stacked, complementary MOS field effect transistor cir...

Process for fabrication of stacked, complementary MOS field effect...

Latent image ram cell

Patents Applicationslast 30 patents

PROGRAMMABLE TRANSCEIVER CIRCUIT

Method for designing structured ASICs in silicon processes with thr...

Method for designing structured ASICS in silicon processes with thr...

High voltage tolerant off chip driver circuit

Method for providing a cell-based ASIC device with multiple power s...

Gate array core cell for VLSI ASIC devices