James Clee

Person

Orefield, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,929,323
- Issue date Feb 23, 2021
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,445,271
- Issue date Oct 15, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for a distributed hardware queue manager
- Patent number 10,216,668
- Issue date Feb 26, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modifying data streams without reordering in a multi-thread, multi-...
- Patent number 9,461,930
- Issue date Oct 4, 2016
- Intel Corporation
- Steven J. Pollock
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Changing a flow identifier of a packet in a multi-thread, multi-flo...
- Patent number 8,949,582
- Issue date Feb 3, 2015
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet assembly module for multi-core, multi-thread network processors
- Patent number 8,943,507
- Issue date Jan 27, 2015
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread synchronization in a multi-thread network communications pro...
- Patent number 8,910,171
- Issue date Dec 9, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread synchronization in a multi-thread, multi-flow network commun...
- Patent number 8,874,878
- Issue date Oct 28, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet assembly module for multi-core, multi-thread network processors
- Patent number 8,761,204
- Issue date Jun 24, 2014
- LSI Corporation
- James T. Clee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread synchronization in a multi-thread network communications pro...
- Patent number 8,514,874
- Issue date Aug 20, 2013
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reduced power consumption bi-directional buffer
- Patent number 6,590,433
- Issue date Jul 8, 2003
- Agere Systems, INC
- James T. Clee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Port router
- Patent number 6,324,613
- Issue date Nov 27, 2001
- Agere Systems Guardian Corp.
- Raul A. Aguilar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for controlling data flow through an IO controller
- Patent number 6,199,137
- Issue date Mar 6, 2001
- Lucent Technolgies, Inc.
- Raul A. Aguilar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Locking system to protect a powered component interface from errone...
- Patent number 6,029,248
- Issue date Feb 22, 2000
- Lucent Technologies Inc. Corporation
- James Thomas Clee
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSING OF PACKET FRAGMENTS
- Publication number 20240334245
- Publication date Oct 3, 2024
- Intel Corporation
- John J. BROWNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOAD BALANCER
- Publication number 20230401109
- Publication date Dec 14, 2023
- Intel Corporation
- Niall D. MCDONNELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20200042479
- Publication date Feb 6, 2020
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Queue Manager for Scheduling Requests in a Processor
- Publication number 20200004584
- Publication date Jan 2, 2020
- William Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER
- Publication number 20170286337
- Publication date Oct 5, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20170192921
- Publication date Jul 6, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thread Synchronization in a Multi-Thread, Multi-Flow Network Commun...
- Publication number 20130089109
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...
- Publication number 20130089098
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modifying Data Streams without Reordering in a Multi-Thread, Multi-...
- Publication number 20130089099
- Publication date Apr 11, 2013
- LSI Corporation
- Steven J. Pollock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS
- Publication number 20120155495
- Publication date Jun 21, 2012
- James T. Clee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS
- Publication number 20110222540
- Publication date Sep 15, 2011
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...
- Publication number 20110222553
- Publication date Sep 15, 2011
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...
- Publication number 20110222552
- Publication date Sep 15, 2011
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reduced power consumption bi-directional buffer
- Publication number 20020070769
- Publication date Jun 13, 2002
- James T. Clee
- H03 - BASIC ELECTRONIC CIRCUITRY

Person

Patents Grantslast 30 patents

Multi-core communication acceleration using hardware queue device

Multi-core communication acceleration using hardware queue device

Technologies for a distributed hardware queue manager

Modifying data streams without reordering in a multi-thread, multi-...

Changing a flow identifier of a packet in a multi-thread, multi-flo...

Packet assembly module for multi-core, multi-thread network processors

Thread synchronization in a multi-thread network communications pro...

Thread synchronization in a multi-thread, multi-flow network commun...

Packet assembly module for multi-core, multi-thread network processors

Thread synchronization in a multi-thread network communications pro...

Reduced power consumption bi-directional buffer

Port router

Method and device for controlling data flow through an IO controller

Locking system to protect a powered component interface from errone...

Patents Applicationslast 30 patents

PROCESSING OF PACKET FRAGMENTS

LOAD BALANCER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

Hardware Queue Manager for Scheduling Requests in a Processor

TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

Thread Synchronization in a Multi-Thread, Multi-Flow Network Commun...

Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...

Modifying Data Streams without Reordering in a Multi-Thread, Multi-...

PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS

PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS

THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...

THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...

Reduced power consumption bi-directional buffer