James D. Allan

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus to implement a reset function in a non-volatil...
- Patent number 8,315,096
- Issue date Nov 20, 2012
- Cypress Semiconductor Corporation
- James D Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to program and erase a non-volatile static ran...
- Patent number 7,539,054
- Issue date May 26, 2009
- Cypress Semiconductor Corp.
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to program both sides of a non-volatile static...
- Patent number 7,518,916
- Issue date Apr 14, 2009
- Cypress Semiconductor Corporation
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to create an erase disturb on a non-volatile s...
- Patent number 7,505,303
- Issue date Mar 17, 2009
- Cypress Semiconductor Corporation
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit, architecture and method for reading an address counter and...
- Patent number 6,510,483
- Issue date Jan 21, 2003
- Cypress Semiconductor Corp.
- Stefan-Cristian Rezeanu
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel test for asynchronous memory
- Patent number 6,324,107
- Issue date Nov 27, 2001
- Cypress Semiconductor Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with interdigitated array having bit line pair...
- Patent number 6,118,727
- Issue date Sep 12, 2000
- Cypress Semiconductor Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel test for asynchronous memory
- Patent number 6,111,800
- Issue date Aug 29, 2000
- Cypress Semiconductor Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Test mode entrance through clocked addresses
- Patent number 6,005,814
- Issue date Dec 21, 1999
- Cypress Semiconductor Corporation
- Sean B. Mulholland
- G11 - INFORMATION STORAGE
Information Patent Grant
Sub-word line driver circuit for memory blocks of a semiconductor m...
- Patent number 5,761,148
- Issue date Jun 2, 1998
- Cypress Semiconductor Corp.
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reducing the access time after a write ope...
- Patent number 5,022,011
- Issue date Jun 4, 1991
- Inova Microelectronics Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
Dram current control technique
- Patent number 4,656,612
- Issue date Apr 7, 1987
- INMOS Corporation
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS substrate bias generator having only P channel transistors in...
- Patent number 4,581,546
- Issue date Apr 8, 1986
- INMOS Corporation
- James D. Allan
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO IMPLEMENT A RESET FUNCTION IN A NON-VOLATIL...
- Publication number 20120213027
- Publication date Aug 23, 2012
- CYPRESS SEMICONDUCTOR CORPORATION
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus to create an erase disturb on a non-volatile s...
- Publication number 20080151643
- Publication date Jun 26, 2008
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus to program and erase a non-volatile static ran...
- Publication number 20080155186
- Publication date Jun 26, 2008
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus to implement a reset function in a non-volatil...
- Publication number 20080151654
- Publication date Jun 26, 2008
- James D. Allan
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus to program both sides of a non-volatile static...
- Publication number 20080151616
- Publication date Jun 26, 2008
- Jayant Ashokkumar
- G11 - INFORMATION STORAGE

James D. Allan

Person

Patents Grantslast 30 patents

Method and apparatus to implement a reset function in a non-volatil...

Method and apparatus to program and erase a non-volatile static ran...

Method and apparatus to program both sides of a non-volatile static...

Method and apparatus to create an erase disturb on a non-volatile s...

Circuit, architecture and method for reading an address counter and...

Parallel test for asynchronous memory

Semiconductor memory with interdigitated array having bit line pair...

Parallel test for asynchronous memory

Test mode entrance through clocked addresses

Sub-word line driver circuit for memory blocks of a semiconductor m...

Apparatus and method for reducing the access time after a write ope...

Dram current control technique

CMOS substrate bias generator having only P channel transistors in...

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO IMPLEMENT A RESET FUNCTION IN A NON-VOLATIL...

Method and apparatus to create an erase disturb on a non-volatile s...

Method and apparatus to program and erase a non-volatile static ran...

Method and apparatus to implement a reset function in a non-volatil...

Method and apparatus to program both sides of a non-volatile static...