James J. Covino

Person

Middlesex, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
DRAM-based separate I/O memory solution for communication applications
- Patent number 6,854,041
- Issue date Feb 8, 2005
- International Business Machines Corporation
- James J. Covino
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for generating impedance matched output signal...
- Patent number 6,737,894
- Issue date May 18, 2004
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cycle independent data to echo clock tracking circuit
- Patent number 6,134,182
- Issue date Oct 17, 2000
- International Business Machines Corporation
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient semiconductor burn-in circuit and method of operation
- Patent number 6,038,181
- Issue date Mar 14, 2000
- Internatioal Business Machines Corp.
- George M. Braceras
- G01 - MEASURING TESTING
Information Patent Grant
Computer unit responsive to difference between external clock perio...
- Patent number 5,978,929
- Issue date Nov 2, 1999
- International Business Machines Corporation
- Jim Covino
- G11 - INFORMATION STORAGE
Information Patent Grant
Folded dummy world line
- Patent number 5,841,720
- Issue date Nov 24, 1998
- International Business Machines Corporation
- James J. Covino
- G11 - INFORMATION STORAGE
Information Patent Grant
Using one memory to supply addresses to an associated memory during...
- Patent number 5,740,098
- Issue date Apr 14, 1998
- International Business Machines Corporation
- Robert Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for accessing semi-associative cache memory us...
- Patent number 5,721,863
- Issue date Feb 24, 1998
- International Business Machines Corporation
- James J. Covino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for parallel addressing of CAMs and RAMs
- Patent number 5,715,188
- Issue date Feb 3, 1998
- International Business Machines Corporation
- James J. Covino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic CMOS circuits with noise immunity
- Patent number 5,650,733
- Issue date Jul 22, 1997
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for testing redundant word and bit lines in a...
- Patent number 5,631,868
- Issue date May 20, 1997
- International Business Machines Corporation
- Luigi Termullo
- G11 - INFORMATION STORAGE
Information Patent Grant
Address buffer for synchronous system
- Patent number 5,625,302
- Issue date Apr 29, 1997
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Using one memory to supply addresses to an associated memory during...
- Patent number 5,563,833
- Issue date Oct 8, 1996
- International Business Machines Corporation
- Robert D. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlocked restore circuit
- Patent number 5,559,453
- Issue date Sep 24, 1996
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DRAM-based separate I/O memory solution for communication applications
- Publication number 20040100851
- Publication date May 27, 2004
- International Business Machines Corporation
- James J. Covino
- G11 - INFORMATION STORAGE

James J. Covino

Person

Patents Grantslast 30 patents

DRAM-based separate I/O memory solution for communication applications

Method and apparatus for generating impedance matched output signal...

Cycle independent data to echo clock tracking circuit

Efficient semiconductor burn-in circuit and method of operation

Computer unit responsive to difference between external clock perio...

Folded dummy world line

Using one memory to supply addresses to an associated memory during...

Method and structure for accessing semi-associative cache memory us...

Method and apparatus for parallel addressing of CAMs and RAMs

Dynamic CMOS circuits with noise immunity

Method and apparatus for testing redundant word and bit lines in a...

Address buffer for synchronous system

Using one memory to supply addresses to an associated memory during...

Interlocked restore circuit

Patents Applicationslast 30 patents

DRAM-based separate I/O memory solution for communication applications