James Jeong

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced grating aligned patterning for EUV direct print processes
- Patent number 12,051,623
- Issue date Jul 30, 2024
- Intel Corporation
- Seyedhamed M Barghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,652,045
- Issue date May 16, 2023
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via contact patterning method to increase edge placement error margin
- Patent number 11,211,324
- Issue date Dec 28, 2021
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-body via liner deposition
- Patent number 9,748,180
- Issue date Aug 29, 2017
- Intel Corporation
- Puneesh Puri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure comprising fine pitch backside metal redistr...
- Patent number 9,716,066
- Issue date Jul 25, 2017
- Intel Corporation
- Kevin J. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double patterning with single hard mask
- Patent number 7,977,248
- Issue date Jul 12, 2011
- Intel Corporation
- Elliot Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for low k dielectric plasma etching with high selectivity t...
- Patent number 7,112,534
- Issue date Sep 26, 2006
- Intel Corporation
- Qiang Fu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT INTERCONNECT STRUCTURES INCLUDING COPPER-FREE VIAS
- Publication number 20230143021
- Publication date May 11, 2023
- Intel Corporation
- Daniel B. OBrien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMULTANEOUS FILLING OF VARIABLE ASPECT RATIO SINGLE DAMASCENE CONT...
- Publication number 20230101107
- Publication date Mar 30, 2023
- Intel Corporation
- AKM Shaestagir CHOWDHURY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED GRATING ALIGNED PATTERNING FOR EUV DIRECT PRINT PROCESSES
- Publication number 20220172857
- Publication date Jun 2, 2022
- Intel Corporation
- Seyedhamed M BARGHI
- G21 - NUCLEAR PHYSICS NUCLEAR ENGINEERING
Information Patent Application
VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN
- Publication number 20220051975
- Publication date Feb 17, 2022
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES
- Publication number 20210183761
- Publication date Jun 17, 2021
- Intel Corporation
- Reken Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN
- Publication number 20210082805
- Publication date Mar 18, 2021
- Intel Corporation
- Mohit K. Haran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-BODY VIA LINER DEPOSITION
- Publication number 20170018509
- Publication date Jan 19, 2017
- Intel Corporation
- PUNEESH PURI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT STRUCTURE COMPRISING FINE PITCH BACKSIDE METAL REDISTR...
- Publication number 20160049371
- Publication date Feb 18, 2016
- Intel Corporation
- Kevin J. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Double patterning with single hard mask
- Publication number 20090170316
- Publication date Jul 2, 2009
- Elliot Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF SUB-RESOLUTION FEATURES FOR AN INTEGRATED CIRCUIT
- Publication number 20090124084
- Publication date May 14, 2009
- Elliot Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for low k dielectric plasma etching with high selectivity t...
- Publication number 20060057852
- Publication date Mar 16, 2006
- Qiang Fu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for controlling critical dimensions and etch bias
- Publication number 20060000796
- Publication date Jan 5, 2006
- Elliot Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for low k dielectric plasma etching with high selectivity t...
- Publication number 20050070116
- Publication date Mar 31, 2005
- Qiang Fu
- H01 - BASIC ELECTRIC ELEMENTS

James Jeong

Person

Patents Grantslast 30 patents

Enhanced grating aligned patterning for EUV direct print processes

Via contact patterning method to increase edge placement error margin

Via contact patterning method to increase edge placement error margin

Through-body via liner deposition

Interconnect structure comprising fine pitch backside metal redistr...

Double patterning with single hard mask

Process for low k dielectric plasma etching with high selectivity t...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT INTERCONNECT STRUCTURES INCLUDING COPPER-FREE VIAS

SIMULTANEOUS FILLING OF VARIABLE ASPECT RATIO SINGLE DAMASCENE CONT...

ENHANCED GRATING ALIGNED PATTERNING FOR EUV DIRECT PRINT PROCESSES

VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN

LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES

VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN

THROUGH-BODY VIA LINER DEPOSITION

INTERCONNECT STRUCTURE COMPRISING FINE PITCH BACKSIDE METAL REDISTR...

Double patterning with single hard mask

FABRICATION OF SUB-RESOLUTION FEATURES FOR AN INTEGRATED CIRCUIT

Process for low k dielectric plasma etching with high selectivity t...

Method for controlling critical dimensions and etch bias

Process for low k dielectric plasma etching with high selectivity t...