James M. Pak

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming high-voltage transistor with thin gate poly
- Patent number 12,029,041
- Issue date Jul 2, 2024
- Infineon Technologies LLC
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming high-voltage transistor with thin gate poly
- Patent number 11,690,227
- Issue date Jun 27, 2023
- Cypress Semiconductor Corporation
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 11,342,429
- Issue date May 24, 2022
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing charge loss in non-volatile memories
- Patent number 10,957,703
- Issue date Mar 23, 2021
- Cypress Semiconductor Corporation
- Pawan Kishore Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded non-volatile memory device and fabrication method of the same
- Patent number 10,872,898
- Issue date Dec 22, 2020
- Cypress Semiconductor Corporation
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 10,818,761
- Issue date Oct 27, 2020
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-gate flash cell formed on recessed substrate
- Patent number 10,497,710
- Issue date Dec 3, 2019
- Cypress Semiconductor Corporation
- Sung-Taeg Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 10,403,731
- Issue date Sep 3, 2019
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming high-voltage transistor with thin gate poly
- Patent number 10,242,996
- Issue date Mar 26, 2019
- Cypress Semiconductor Corporation
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing charge loss in non-volatile memories
- Patent number 10,068,912
- Issue date Sep 4, 2018
- Cypress Semiconductor Corporation
- Pawan Kishore Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 10,014,380
- Issue date Jul 3, 2018
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 9,917,166
- Issue date Mar 13, 2018
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-gate flash cell formed on recessed substrate
- Patent number 9,853,039
- Issue date Dec 26, 2017
- Cypress Semiconductor Corporation
- Sung-Taeg Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-gate flash cell formed on recessed substrate
- Patent number 9,818,755
- Issue date Nov 14, 2017
- Cypress Semiconductor Corporation
- Sung-Taeg Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory first process flow and device
- Patent number 9,368,606
- Issue date Jun 14, 2016
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adaptively programming or erasing flash memory blocks
- Patent number 8,724,388
- Issue date May 13, 2014
- Spansion LLC
- Tio Wei Neo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for detecting sequential processing effects using on-tool ra...
- Patent number 6,947,804
- Issue date Sep 20, 2005
- Advanced Micro Devices, Inc.
- James M. Pak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Arrangement and method for detecting sequential processing effects...
- Patent number 5,930,138
- Issue date Jul 27, 1999
- Advanced Micro Devices, Inc.
- Yung-Tao Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arrangement and method for detecting sequential processing effects...
- Patent number 5,761,065
- Issue date Jun 2, 1998
- Advanced Micro Devices, Inc.
- Richard Charles Kittler
- G05 - CONTROLLING REGULATING
Information Patent Grant
Arrangement and method for detecting sequential processing effects...
- Patent number 5,716,856
- Issue date Feb 10, 1998
- Advanced Micro Devices, Inc.
- Yung-Tao Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH-VOLTAGE TRANSISTOR WITH THIN HIGH-K METAL GATE AND METHOD OF F...
- Publication number 20240206183
- Publication date Jun 20, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming High-Voltage Transistor with Thin Gate Poly
- Publication number 20240008279
- Publication date Jan 4, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming High-Voltage Transistor with Thin Gate Poly
- Publication number 20210296343
- Publication date Sep 23, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED NON-VOLATILE MEMORY DEVICE AND FABRICATION METHOD OF THE SAME
- Publication number 20210134811
- Publication date May 6, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20210091198
- Publication date Mar 25, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20190386109
- Publication date Dec 19, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming High-Voltage Transistor with Thin Gate Poly
- Publication number 20190304990
- Publication date Oct 3, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF REDUCING CHARGE LOSS IN NON-VOLATILE MEMORIES
- Publication number 20190074286
- Publication date Mar 7, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Pawan Kishore Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming High-Voltage Transistor with Thin Gate Poly
- Publication number 20190027487
- Publication date Jan 24, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED NON-VOLATILE MEMORY DEVICE AND FABRICATION METHOD OF THE SAME
- Publication number 20190027484
- Publication date Jan 24, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Chun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20180366551
- Publication date Dec 20, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Split-Gate Flash Cell formed on Recessed Substrate
- Publication number 20180166458
- Publication date Jun 14, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Sung-Taeg Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20170141201
- Publication date May 18, 2017
- CYPRESS SEMICONDUCTOR CORPORATION
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20160293720
- Publication date Oct 6, 2016
- CYPRESS SEMICONDUCTOR CORPORATION
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Charge Trapping Device with Improved Select Gate to Memory Gate Iso...
- Publication number 20140167136
- Publication date Jun 19, 2014
- SPANSION LLC
- Mark RAMSBEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory First Process Flow and Device
- Publication number 20140167140
- Publication date Jun 19, 2014
- SPANSION LLC
- Shenqing FANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Adaptively Programming or Erasing Flash Memory Blocks
- Publication number 20130258775
- Publication date Oct 3, 2013
- SPANSION LLC
- Tio Wei NEO
- G11 - INFORMATION STORAGE
Information Patent Application
PROCESS OF FABRICATING A WORKPIECE USING A TEST MASK
- Publication number 20100055809
- Publication date Mar 4, 2010
- SPANSION LLC
- James M. Pak
- H01 - BASIC ELECTRIC ELEMENTS

James M. Pak

Person

Patents Grantslast 30 patents

Method of forming high-voltage transistor with thin gate poly

Method of forming high-voltage transistor with thin gate poly

Memory first process flow and device

Method of reducing charge loss in non-volatile memories

Embedded non-volatile memory device and fabrication method of the same

Memory first process flow and device

Split-gate flash cell formed on recessed substrate

Memory first process flow and device

Method of forming high-voltage transistor with thin gate poly

Method of reducing charge loss in non-volatile memories

Memory first process flow and device

Memory first process flow and device

Split-gate flash cell formed on recessed substrate

Split-gate flash cell formed on recessed substrate

Memory first process flow and device

Adaptively programming or erasing flash memory blocks

Method for detecting sequential processing effects using on-tool ra...

Arrangement and method for detecting sequential processing effects...

Arrangement and method for detecting sequential processing effects...

Arrangement and method for detecting sequential processing effects...

Patents Applicationslast 30 patents

HIGH-VOLTAGE TRANSISTOR WITH THIN HIGH-K METAL GATE AND METHOD OF F...

Method of Forming High-Voltage Transistor with Thin Gate Poly

Method of Forming High-Voltage Transistor with Thin Gate Poly

EMBEDDED NON-VOLATILE MEMORY DEVICE AND FABRICATION METHOD OF THE SAME

Memory First Process Flow and Device

Memory First Process Flow and Device

Method of Forming High-Voltage Transistor with Thin Gate Poly

METHOD OF REDUCING CHARGE LOSS IN NON-VOLATILE MEMORIES

Method of Forming High-Voltage Transistor with Thin Gate Poly

EMBEDDED NON-VOLATILE MEMORY DEVICE AND FABRICATION METHOD OF THE SAME

Memory First Process Flow and Device

Split-Gate Flash Cell formed on Recessed Substrate

Memory First Process Flow and Device

Memory First Process Flow and Device

Charge Trapping Device with Improved Select Gate to Memory Gate Iso...

Memory First Process Flow and Device

Adaptively Programming or Erasing Flash Memory Blocks

PROCESS OF FABRICATING A WORKPIECE USING A TEST MASK