James Y. Cho

Person

Los Gatos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System on a chip for networking
- Patent number 7,991,922
- Issue date Aug 2, 2011
- Broadcom Corporation
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip for networking
- Patent number 7,660,931
- Issue date Feb 9, 2010
- Broadcom Corporation
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip for networking
- Patent number 7,418,534
- Issue date Aug 26, 2008
- Broadcom Corporation
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus sampling on one edge of a clock signal and driving on another edge
- Patent number 7,093,052
- Issue date Aug 15, 2006
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus precharge during a phase of a clock signal to eliminate idle cl...
- Patent number 7,076,582
- Issue date Jul 11, 2006
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with programmable configuration
- Patent number 6,877,076
- Issue date Apr 5, 2005
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent reset of arbiters and agents to allow for delayed agent...
- Patent number 6,865,633
- Issue date Mar 8, 2005
- Broadcom Corporation
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus precharge during a phase of a clock signal to eliminate idle cl...
- Patent number 6,816,932
- Issue date Nov 9, 2004
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip for networking
- Patent number 6,766,389
- Issue date Jul 20, 2004
- Broadcom Corporation
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page open hint in transactions
- Patent number 6,681,302
- Issue date Jan 20, 2004
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus sampling on one edge of a clock signal and driving on another edge
- Patent number 6,678,767
- Issue date Jan 13, 2004
- Broadcom Corp.
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent reset of arbiters and agents to allow for delayed agent...
- Patent number 6,633,938
- Issue date Oct 14, 2003
- Broadcom Corporation
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out of order associative queue in two clock domains
- Patent number 6,629,218
- Issue date Sep 30, 2003
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with programmable configuration
- Patent number 6,625,685
- Issue date Sep 23, 2003
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page open hint in transactions
- Patent number 6,526,483
- Issue date Feb 25, 2003
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out of order associative queue in two clock domains
- Patent number 6,449,701
- Issue date Sep 10, 2002
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for dynamically reconfigurable timed flushing...
- Patent number 6,321,300
- Issue date Nov 20, 2001
- Rise Technology Company
- Matthew D. Ornes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable hit and write policy for cache memory test
- Patent number 6,240,532
- Issue date May 29, 2001
- Rise Technology Company
- James Y. Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory address translation system having modifiable and non-modifia...
- Patent number 5,255,384
- Issue date Oct 19, 1993
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache providing caching/non-caching write-through and copyback mode...
- Patent number 5,091,846
- Issue date Feb 25, 1992
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for maintaining consistency of a cache memory with a prim...
- Patent number 4,933,835
- Issue date Jun 12, 1990
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache-MMU system
- Patent number 4,899,275
- Issue date Feb 6, 1990
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for addressing a cache memory
- Patent number 4,884,197
- Issue date Nov 28, 1989
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quadword boundary cache system
- Patent number 4,860,192
- Issue date Aug 22, 1989
- Intergraph Corporation
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BRANCH TARGET BUFFER OPERATION WITH AUXILIARY INDIRECT CACHE
- Publication number 20240192958
- Publication date Jun 13, 2024
- Akeana, Inc.
- James Youngsae Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a chip for networking
- Publication number 20100100681
- Publication date Apr 22, 2010
- BROADCOM CORPORATION
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON A CHIP FOR NETWORKING
- Publication number 20080276018
- Publication date Nov 6, 2008
- BROADCOM CORPORATION
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bus precharge during a phase of a clock signal to eliminate idle cl...
- Publication number 20050038943
- Publication date Feb 17, 2005
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a chip for networking
- Publication number 20050027911
- Publication date Feb 3, 2005
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bus sampling on one edge of a clock signal and driving on another edge
- Publication number 20040098635
- Publication date May 20, 2004
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Independent reset of arbiters and agents to allow for delayed agent...
- Publication number 20040049620
- Publication date Mar 11, 2004
- Broadcom Corporation
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Page open hint in transactions
- Publication number 20030126383
- Publication date Jul 3, 2003
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Out of order associative queue in two clock domains
- Publication number 20020184455
- Publication date Dec 5, 2002
- Broadcom Corporation
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a chip for networking
- Publication number 20020174253
- Publication date Nov 21, 2002
- Broadcom Corporation
- Mark D. Hayter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bus precharge during a phase of a clock signal to eliminate idle cl...
- Publication number 20020041633
- Publication date Apr 11, 2002
- James Y. Cho
- G06 - COMPUTING CALCULATING COUNTING

James Y. Cho

Person

Patents Grantslast 30 patents

System on a chip for networking

System on a chip for networking

System on a chip for networking

Bus sampling on one edge of a clock signal and driving on another edge

Bus precharge during a phase of a clock signal to eliminate idle cl...

Memory controller with programmable configuration

Independent reset of arbiters and agents to allow for delayed agent...

Bus precharge during a phase of a clock signal to eliminate idle cl...

System on a chip for networking

Page open hint in transactions

Bus sampling on one edge of a clock signal and driving on another edge

Independent reset of arbiters and agents to allow for delayed agent...

Out of order associative queue in two clock domains

Memory controller with programmable configuration

Page open hint in transactions

Out of order associative queue in two clock domains

Apparatus and method for dynamically reconfigurable timed flushing...

Programmable hit and write policy for cache memory test

Memory address translation system having modifiable and non-modifia...

Cache providing caching/non-caching write-through and copyback mode...

Apparatus for maintaining consistency of a cache memory with a prim...

Cache-MMU system

Method and apparatus for addressing a cache memory

Quadword boundary cache system

Patents Applicationslast 30 patents

BRANCH TARGET BUFFER OPERATION WITH AUXILIARY INDIRECT CACHE

System on a chip for networking

SYSTEM ON A CHIP FOR NETWORKING

Bus precharge during a phase of a clock signal to eliminate idle cl...

System on a chip for networking

Bus sampling on one edge of a clock signal and driving on another edge

Independent reset of arbiters and agents to allow for delayed agent...

Page open hint in transactions

Out of order associative queue in two clock domains

System on a chip for networking

Bus precharge during a phase of a clock signal to eliminate idle cl...