Jan E. Vandemeer

Person

Mesa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,804,179
- Issue date Oct 13, 2020
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for processing product wafers using carrier substrates
- Patent number 10,759,660
- Issue date Sep 1, 2020
- Qorvo US, Inc.
- Jonathan Hammond
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,679,918
- Issue date Jun 9, 2020
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,636,720
- Issue date Apr 28, 2020
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,600,711
- Issue date Mar 24, 2020
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,529,639
- Issue date Jan 7, 2020
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,486,965
- Issue date Nov 26, 2019
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,490,476
- Issue date Nov 26, 2019
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,486,963
- Issue date Nov 26, 2019
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,442,684
- Issue date Oct 15, 2019
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,442,687
- Issue date Oct 15, 2019
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,407,302
- Issue date Sep 10, 2019
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,377,627
- Issue date Aug 13, 2019
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,364,146
- Issue date Jul 30, 2019
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,239,751
- Issue date Mar 26, 2019
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,227,231
- Issue date Mar 12, 2019
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,196,260
- Issue date Feb 5, 2019
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,160,643
- Issue date Dec 25, 2018
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,155,658
- Issue date Dec 18, 2018
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer-level package with enhanced performance
- Patent number 10,109,550
- Issue date Oct 23, 2018
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate structure with embedded layer for post-processing silicon...
- Patent number 10,038,055
- Issue date Jul 31, 2018
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate structure with embedded layer for post-processing silicon...
- Patent number 9,978,838
- Issue date May 22, 2018
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate structure with embedded layer for post-processing silicon...
- Patent number 9,947,745
- Issue date Apr 17, 2018
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Suppression of back-gate transistors in RF CMOS switches built on a...
- Patent number 9,806,192
- Issue date Oct 31, 2017
- Qorvo US, Inc.
- Philip W. Mason
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Glass wafer assembly
- Patent number 9,688,529
- Issue date Jun 27, 2017
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Thermally tolerant electromechanical actuators
- Patent number 8,314,467
- Issue date Nov 20, 2012
- RF Micro Devices, Inc.
- Jonathan Hale Hammond
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
MEM structure having reduced spring stiction
- Patent number 7,000,473
- Issue date Feb 21, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Jan E. Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE
- Publication number 20190057922
- Publication date Feb 21, 2019
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE
- Publication number 20180047653
- Publication date Feb 15, 2018
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE
- Publication number 20180044169
- Publication date Feb 15, 2018
- Qorvo US, Inc.
- Merrill Albert Hatcher
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE
- Publication number 20180044177
- Publication date Feb 15, 2018
- Qorvo US, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SUBSTRATE STRUCTURE WITH EMBEDDED LAYER FOR POST-PROCESSING SILICON...
- Publication number 20170309709
- Publication date Oct 26, 2017
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPPRESSION OF BACK-GATE TRANSISTORS IN RF CMOS SWITCHES BUILT ON A...
- Publication number 20160380101
- Publication date Dec 29, 2016
- RF Micro Devices, Inc.
- Philip W. Mason
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE STRUCTURE WITH EMBEDDED LAYER FOR POST-PROCESSING SILICON...
- Publication number 20160343604
- Publication date Nov 24, 2016
- RF Micro Devices, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HERMETICALLY SEALED THROUGH VIAS (TVS)
- Publication number 20160219704
- Publication date Jul 28, 2016
- RF Micro Devices, Inc.
- Jan Edward Vandemeer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS WAFER ASSEMBLY
- Publication number 20150353348
- Publication date Dec 10, 2015
- RF Micro Devices, Inc.
- Jan Edward Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD FOR PROCESSING PRODUCT WAFERS USING CARRIER SUBSTRATES
- Publication number 20150329355
- Publication date Nov 19, 2015
- RF Micro Devices, Inc.
- Jonathan Hammond
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MEM structure having reduced spring stiction
- Publication number 20050229706
- Publication date Oct 20, 2005
- Jan E. Vandemeer
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Jan E. Vandemeer

Person

Patents Grantslast 30 patents

Wafer-level package with enhanced performance

Method for processing product wafers using carrier substrates

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Wafer-level package with enhanced performance

Substrate structure with embedded layer for post-processing silicon...

Substrate structure with embedded layer for post-processing silicon...

Substrate structure with embedded layer for post-processing silicon...

Suppression of back-gate transistors in RF CMOS switches built on a...

Glass wafer assembly

Thermally tolerant electromechanical actuators

MEM structure having reduced spring stiction

Patents Applicationslast 30 patents

WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE

WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE

WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE

WAFER-LEVEL PACKAGE WITH ENHANCED PERFORMANCE

SUBSTRATE STRUCTURE WITH EMBEDDED LAYER FOR POST-PROCESSING SILICON...

SUPPRESSION OF BACK-GATE TRANSISTORS IN RF CMOS SWITCHES BUILT ON A...

SUBSTRATE STRUCTURE WITH EMBEDDED LAYER FOR POST-PROCESSING SILICON...

HERMETICALLY SEALED THROUGH VIAS (TVS)

GLASS WAFER ASSEMBLY

METHOD FOR PROCESSING PRODUCT WAFERS USING CARRIER SUBSTRATES

MEM structure having reduced spring stiction