Jayendra Bhakta

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory cell system with charge trap
- Patent number 8,143,661
- Issue date Mar 27, 2012
- Spansion LLC
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CVD gas injector and method therefor
- Patent number 7,084,074
- Issue date Aug 1, 2006
- Advanced Micro Devices, Inc.
- Michael J. D'Elia
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Shallow trench isolation using antireflection layer
- Patent number 7,061,075
- Issue date Jun 13, 2006
- Advanced Micro Devices, Inc.
- Carl P. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation using antireflection layer
- Patent number 6,821,883
- Issue date Nov 23, 2004
- Advanced Micro Devices, Inc.
- Carl P. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming shallow trench isolation using antireflection layer
- Patent number 6,645,868
- Issue date Nov 11, 2003
- Advanced Micro Devices, Inc.
- Carl P. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing nitride residue on a silicon wafer
- Patent number 6,605,517
- Issue date Aug 12, 2003
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation spacer for weff improvement
- Patent number 6,566,230
- Issue date May 20, 2003
- Advanced Micro Devices, Inc.
- Harpreet K. Sachar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for an increased throughput furnace nitride BA...
- Patent number 6,500,774
- Issue date Dec 31, 2002
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Exposure correction based on reflective index for photolithographic...
- Patent number 6,482,573
- Issue date Nov 19, 2002
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Simplified method of patterning polysilicon gate in a semiconductor...
- Patent number 6,475,892
- Issue date Nov 5, 2002
- AAdvanced Micro Devices, Inc.
- Jayendra D. Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mesh filter design for LPCVD TEOS exhaust system
- Patent number 6,458,212
- Issue date Oct 1, 2002
- Advanced Micro Devices, Inc.
- Fuodoor Gologhlan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Simplified method of patterning polysilicon gate in a semiconductor...
- Patent number 6,337,264
- Issue date Jan 8, 2002
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified method of patterning field dielectric regions in a semic...
- Patent number 6,335,235
- Issue date Jan 1, 2002
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of etching contacts with reduced oxide stress
- Patent number 6,333,218
- Issue date Dec 25, 2001
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ feedback system for localized CMP thickness control
- Patent number 6,303,507
- Issue date Oct 16, 2001
- Advanced Micro Devices, Inc.
- Weizhong Wang
- B24 - GRINDING POLISHING
Information Patent Grant
Method of etching contacts with reduced oxide stress
- Patent number 6,258,697
- Issue date Jul 10, 2001
- Advanced Micro Devices, Inc.
- Jayendra Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation using antireflection layer
- Patent number 6,255,717
- Issue date Jul 3, 2001
- Advanced Micro Devices, Inc.
- Carl P. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified method of patterning polysilicon gate in a semiconductor...
- Patent number 6,107,167
- Issue date Aug 22, 2000
- Advanced Micro Devices, Inc.
- Jayendra D. Bhakta
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH IMPLANT OXIDE
- Publication number 20080142874
- Publication date Jun 19, 2008
- SPANSION LLC
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL SYSTEM WITH CHARGE TRAP
- Publication number 20080083946
- Publication date Apr 10, 2008
- SPANSION LLC
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flash memory cell structure for increased program speed and erase s...
- Publication number 20080079061
- Publication date Apr 3, 2008
- Advanced Micro Devices, Inc.
- Meng Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Void reduction and increased throughput in trench fill processes
- Publication number 20020081817
- Publication date Jun 27, 2002
- Jayendra Bhakta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMPLIFIED METHOD OF PATTERNING FIELD DIELECTRIC REGIONS IN A SEMIC...
- Publication number 20020009845
- Publication date Jan 24, 2002
- JAYENDRA D. BHAKTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMPLIFIED METHOD OF PATTERNING POLYSILICON GATE IN A SEMICONDUCTOR...
- Publication number 20010013623
- Publication date Aug 16, 2001
- JAYENDRA D. BHAKTA
- H01 - BASIC ELECTRIC ELEMENTS

Jayendra Bhakta

Person

Patents Grantslast 30 patents

Memory cell system with charge trap

CVD gas injector and method therefor

Shallow trench isolation using antireflection layer

Shallow trench isolation using antireflection layer

Method of forming shallow trench isolation using antireflection layer

Method for minimizing nitride residue on a silicon wafer

Shallow trench isolation spacer for weff improvement

Method and apparatus for an increased throughput furnace nitride BA...

Exposure correction based on reflective index for photolithographic...

Simplified method of patterning polysilicon gate in a semiconductor...

Mesh filter design for LPCVD TEOS exhaust system

Simplified method of patterning polysilicon gate in a semiconductor...

Simplified method of patterning field dielectric regions in a semic...

Method of etching contacts with reduced oxide stress

In-situ feedback system for localized CMP thickness control

Method of etching contacts with reduced oxide stress

Shallow trench isolation using antireflection layer

Simplified method of patterning polysilicon gate in a semiconductor...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT SYSTEM WITH IMPLANT OXIDE

MEMORY CELL SYSTEM WITH CHARGE TRAP

Flash memory cell structure for increased program speed and erase s...

Void reduction and increased throughput in trench fill processes

SIMPLIFIED METHOD OF PATTERNING FIELD DIELECTRIC REGIONS IN A SEMIC...

SIMPLIFIED METHOD OF PATTERNING POLYSILICON GATE IN A SEMICONDUCTOR...