Jeannie T. H. Panner

Person

Underhill Center, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Automation of fuse compression for an ASIC design system
- Patent number 8,024,626
- Issue date Sep 20, 2011
- International Business Machines Corporation
- Janice M. Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Automation of fuse compression for an ASIC design system
- Patent number 7,174,486
- Issue date Feb 6, 2007
- International Business Machines Corporation
- Janice M. Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 7,096,436
- Issue date Aug 22, 2006
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated audit methodology for design
- Patent number 6,931,573
- Issue date Aug 16, 2005
- International Business Machines Corporation
- Janice M. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 6,883,155
- Issue date Apr 19, 2005
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of automated design and checking for ESD robustness
- Patent number 6,725,439
- Issue date Apr 20, 2004
- International Business Machines Corporation
- Philip S. Homsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Macro design techniques to accommodate chip level wiring and circui...
- Patent number 6,543,040
- Issue date Apr 1, 2003
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated fuse blow software system
- Patent number 6,505,324
- Issue date Jan 7, 2003
- International Business Machines Corporation
- Bruce Cowan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor wiring technique for reducing electromigration
- Patent number 6,308,302
- Issue date Oct 23, 2001
- International Business Machines Corporation
- David James Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimensional track-based parasitic extraction
- Patent number 6,185,722
- Issue date Feb 6, 2001
- International Business Machines Corporation
- Laura Rohwedder Darden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant vias
- Patent number 6,026,224
- Issue date Feb 15, 2000
- International Business Machines Corporation
- Laura Rohwedder Darden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for building and verifying authenticity of a rule system
- Patent number 5,751,595
- Issue date May 12, 1998
- International Business Machines Corporation
- Harry John Beatty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wiring design tool improvement for avoiding electromigration by det...
- Patent number 5,737,580
- Issue date Apr 7, 1998
- International Business Machines Corporation
- David James Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for making a skew-controlled signal distributi...
- Patent number 5,339,253
- Issue date Aug 16, 1994
- International Business Machines Corporation
- Keith M. Carrig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit driver inhibit control test method
- Patent number 5,127,008
- Issue date Jun 30, 1992
- International Business Machines Corporation
- Robert W. Bassett
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATION OF FUSE COMPRESSION FOR AN ASIC DESIGN SYSTEM
- Publication number 20070047343
- Publication date Mar 1, 2007
- Janice M. Adams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Macro design techniques to accommodate chip level wiring and circui...
- Publication number 20050039153
- Publication date Feb 17, 2005
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automation of fuse compression for an asic design system
- Publication number 20040153900
- Publication date Aug 5, 2004
- International Business Machines Corporation
- Janice M. Adams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Macro design techniques to accommodate chip level wiring and circui...
- Publication number 20030204829
- Publication date Oct 30, 2003
- International Business Machines Corporation
- Thomas R. Bednar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automated audit methodology for design
- Publication number 20030037315
- Publication date Feb 20, 2003
- International Business Machines Corporation
- Janice M. Adams
- G06 - COMPUTING CALCULATING COUNTING

Jeannie T. H. Panner

Person

Patents Grantslast 30 patents

Automation of fuse compression for an ASIC design system

Automation of fuse compression for an ASIC design system

Macro design techniques to accommodate chip level wiring and circui...

Automated audit methodology for design

Macro design techniques to accommodate chip level wiring and circui...

Method of automated design and checking for ESD robustness

Macro design techniques to accommodate chip level wiring and circui...

Automated fuse blow software system

Semiconductor wiring technique for reducing electromigration

Three dimensional track-based parasitic extraction

Redundant vias

Method for building and verifying authenticity of a rule system

Wiring design tool improvement for avoiding electromigration by det...

Method and apparatus for making a skew-controlled signal distributi...

Integrated circuit driver inhibit control test method

Patents Applicationslast 30 patents

AUTOMATION OF FUSE COMPRESSION FOR AN ASIC DESIGN SYSTEM

Macro design techniques to accommodate chip level wiring and circui...

Automation of fuse compression for an asic design system

Macro design techniques to accommodate chip level wiring and circui...

Automated audit methodology for design