Jeffrey R. Wilcox

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Common platform for one-level memory architecture and two-level mem...
- Patent number 11,221,762
- Issue date Jan 11, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power savings with state retention
- Patent number 10,712,809
- Issue date Jul 14, 2020
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Common platform for one-level memory architecture and two-level mem...
- Patent number 10,228,861
- Issue date Mar 12, 2019
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power savings with state retention
- Patent number 10,175,744
- Issue date Jan 8, 2019
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing power consumption in a memory bus...
- Patent number 10,102,157
- Issue date Oct 16, 2018
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory interface
- Patent number 9,910,771
- Issue date Mar 6, 2018
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically modulating link width
- Patent number 9,794,349
- Issue date Oct 17, 2017
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Common platform for one-level memory architecture and two-level mem...
- Patent number 9,600,413
- Issue date Mar 21, 2017
- Intel Corporation
- Joydeep Ray
- G11 - INFORMATION STORAGE
Information Patent Grant
Link power savings with state retention
- Patent number 9,588,575
- Issue date Mar 7, 2017
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Controlling reduced power states using platform latency tolerance
- Patent number 9,541,983
- Issue date Jan 10, 2017
- Intel Corporation
- Barnes Cooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory interface
- Patent number 9,535,829
- Issue date Jan 3, 2017
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling reduced power states using platform latency tolerance
- Patent number 9,195,292
- Issue date Nov 24, 2015
- Intel Corporation
- Barnes Cooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically modulating link width
- Patent number 8,914,541
- Issue date Dec 16, 2014
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power savings with state retention
- Patent number 8,831,666
- Issue date Sep 9, 2014
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface frequency modulation to allow non-terminated operation an...
- Patent number 8,707,072
- Issue date Apr 22, 2014
- Intel Corporation
- Jeffrey R. Wilcox
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Technique for lane virtualization
- Patent number 8,204,067
- Issue date Jun 19, 2012
- Intel Corporation
- Naveen Cherukuri
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for reducing power consumption in a memory bus...
- Patent number 8,176,240
- Issue date May 8, 2012
- Intel Corporation
- Jeffrey R. Wilcox
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dynamically modulating link width
- Patent number 8,046,488
- Issue date Oct 25, 2011
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface frequency modulation to allow non-terminated operation an...
- Patent number 7,945,793
- Issue date May 17, 2011
- Intel Corporation
- Jeffrey R. Wilcox
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus of collecting timer ticks
- Patent number 7,886,177
- Issue date Feb 8, 2011
- Intel Corporation
- Joseph A. Bennett
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Link power saving state
- Patent number 7,610,500
- Issue date Oct 27, 2009
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
P-state feedback to operating system with hardware coordination
- Patent number 7,360,103
- Issue date Apr 15, 2008
- Intel Corporation
- Bernard J. Lint
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power state coordination between devices sharing power-managed reso...
- Patent number 7,315,952
- Issue date Jan 1, 2008
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power saving state
- Patent number 7,313,712
- Issue date Dec 25, 2007
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware coordination of power management activities
- Patent number 7,272,741
- Issue date Sep 18, 2007
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for an integrated circuit having flexible-rati...
- Patent number 7,257,728
- Issue date Aug 14, 2007
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for an integrated circuit having flexible-rati...
- Patent number 7,007,187
- Issue date Feb 28, 2006
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing power consumption in a memory bus...
- Patent number 7,000,065
- Issue date Feb 14, 2006
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for power efficient line driver
- Patent number 6,970,010
- Issue date Nov 29, 2005
- Intel Corporation
- Jeffrey R. Wilcox
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory system that measures power consumption
- Patent number 6,944,084
- Issue date Sep 13, 2005
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20190346909
- Publication date Nov 14, 2019
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...
- Publication number 20190179531
- Publication date Jun 13, 2019
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20170336853
- Publication date Nov 23, 2017
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY INTERFACE
- Publication number 20170212832
- Publication date Jul 27, 2017
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...
- Publication number 20170147214
- Publication date May 25, 2017
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Reduced Power States Using Platform Latency Tolerance
- Publication number 20160041595
- Publication date Feb 11, 2016
- Intel Corporation
- Barnes Cooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...
- Publication number 20150178204
- Publication date Jun 25, 2015
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY MODULATING LINK WIDTH
- Publication number 20150081921
- Publication date Mar 19, 2015
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20150074440
- Publication date Mar 12, 2015
- Intel Corporation
- NAVEEN CHERUKURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY INTERFACE
- Publication number 20150032941
- Publication date Jan 29, 2015
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Reduced Power States Using Platform Latency Tolerance
- Publication number 20150006923
- Publication date Jan 1, 2015
- Barnes Cooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Reducing Power Consumption In A Memory Bus...
- Publication number 20130103867
- Publication date Apr 25, 2013
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Modulating Link Width
- Publication number 20120011276
- Publication date Jan 12, 2012
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE FREQUENCY MODULATION TO ALLOW NON-TERMINATED OPERATION AN...
- Publication number 20110276815
- Publication date Nov 10, 2011
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20100330927
- Publication date Dec 30, 2010
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS OF COLLECTING TIMER TICKS
- Publication number 20080162976
- Publication date Jul 3, 2008
- Joseph A. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080091963
- Publication date Apr 17, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080075107
- Publication date Mar 27, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080077814
- Publication date Mar 27, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface frequency modulation to allow non-terminated operation an...
- Publication number 20080040624
- Publication date Feb 14, 2008
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for reducing power consumption in a memory bus...
- Publication number 20060190751
- Publication date Aug 24, 2006
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Packet exchange for controlling system power modes
- Publication number 20060080461
- Publication date Apr 13, 2006
- Jeffrey R. Wilcox
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dynamically modulating link width
- Publication number 20060034295
- Publication date Feb 16, 2006
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware coordination of power management activities
- Publication number 20050273633
- Publication date Dec 8, 2005
- Intel Corporation
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power state coordination between devices sharing power-managed reso...
- Publication number 20050273635
- Publication date Dec 8, 2005
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for lane virtualization
- Publication number 20050259599
- Publication date Nov 24, 2005
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
P-state feedback to operating system with hardware coordination
- Publication number 20050262365
- Publication date Nov 24, 2005
- Bernard J. Lint
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Link power saving state
- Publication number 20050262368
- Publication date Nov 24, 2005
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low latency buffer control system and method
- Publication number 20050086420
- Publication date Apr 21, 2005
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for an integrated circuit having flexible-rati...
- Publication number 20040236979
- Publication date Nov 25, 2004
- Jeffrey R. Wilcox
- G06 - COMPUTING CALCULATING COUNTING

Jeffrey R. Wilcox

Person

Patents Grantslast 30 patents

Common platform for one-level memory architecture and two-level mem...

Link power savings with state retention

Common platform for one-level memory architecture and two-level mem...

Link power savings with state retention

Method and apparatus for reducing power consumption in a memory bus...

Non-volatile memory interface

Dynamically modulating link width

Common platform for one-level memory architecture and two-level mem...

Link power savings with state retention

Controlling reduced power states using platform latency tolerance

Non-volatile memory interface

Controlling reduced power states using platform latency tolerance

Dynamically modulating link width

Link power savings with state retention

Interface frequency modulation to allow non-terminated operation an...

Technique for lane virtualization

Method and apparatus for reducing power consumption in a memory bus...

Dynamically modulating link width

Interface frequency modulation to allow non-terminated operation an...

Method and apparatus of collecting timer ticks

Link power saving state

P-state feedback to operating system with hardware coordination

Power state coordination between devices sharing power-managed reso...

Link power saving state

Hardware coordination of power management activities

Method and apparatus for an integrated circuit having flexible-rati...

Method and apparatus for an integrated circuit having flexible-rati...

Method and apparatus for reducing power consumption in a memory bus...

Apparatus and method for power efficient line driver

Memory system that measures power consumption

Patents Applicationslast 30 patents

LINK POWER SAVINGS WITH STATE RETENTION

COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...

LINK POWER SAVINGS WITH STATE RETENTION

NON-VOLATILE MEMORY INTERFACE

COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...

Controlling Reduced Power States Using Platform Latency Tolerance

COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEM...

DYNAMICALLY MODULATING LINK WIDTH

LINK POWER SAVINGS WITH STATE RETENTION

NON-VOLATILE MEMORY INTERFACE

Controlling Reduced Power States Using Platform Latency Tolerance

Method And Apparatus For Reducing Power Consumption In A Memory Bus...

Dynamically Modulating Link Width

INTERFACE FREQUENCY MODULATION TO ALLOW NON-TERMINATED OPERATION AN...

LINK POWER SAVINGS WITH STATE RETENTION

METHOD AND APPARATUS OF COLLECTING TIMER TICKS

LINK POWER SAVING STATE

LINK POWER SAVING STATE

LINK POWER SAVING STATE

Interface frequency modulation to allow non-terminated operation an...

Method and apparatus for reducing power consumption in a memory bus...

Packet exchange for controlling system power modes

Dynamically modulating link width

Hardware coordination of power management activities

Power state coordination between devices sharing power-managed reso...

Technique for lane virtualization

P-state feedback to operating system with hardware coordination

Link power saving state

Low latency buffer control system and method

Method and apparatus for an integrated circuit having flexible-rati...