Jeng-Dar Ko

Person

Pade City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Electrically stackable semiconductor wafer and chip packages
- Patent number 9,601,474
- Issue date Mar 21, 2017
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer leveled chip packaging structure and method thereof
- Patent number 9,059,181
- Issue date Jun 16, 2015
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 8,587,091
- Issue date Nov 19, 2013
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package device
- Patent number 8,314,482
- Issue date Nov 20, 2012
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device package and method of manufacturing the same
- Patent number 7,838,333
- Issue date Nov 23, 2010
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device package and method of manufacturing the same
- Patent number 7,632,707
- Issue date Dec 15, 2009
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 7,528,009
- Issue date May 5, 2009
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-leveled chip packaging structure and method thereof
- Patent number 7,294,920
- Issue date Nov 13, 2007
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Wafer Leveled Chip Packaging Structure and Method Thereof
- Publication number 20150364457
- Publication date Dec 17, 2015
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Leveled Chip Packaging Structure and Method Thereof
- Publication number 20140217587
- Publication date Aug 7, 2014
- Invensas Corporation
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-LEVELED CHIP PACKAGING STRUCTURE AND METHOD THEREOF
- Publication number 20120267765
- Publication date Oct 25, 2012
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20100112757
- Publication date May 6, 2010
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20080029870
- Publication date Feb 7, 2008
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20070197018
- Publication date Aug 23, 2007
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device package and method of manufacturing the same
- Publication number 20060157864
- Publication date Jul 20, 2006
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-leveled chip packaging structure and method thereof
- Publication number 20060019484
- Publication date Jan 26, 2006
- Industrial Technology Research Institute
- Shou-Lung Chen
- H01 - BASIC ELECTRIC ELEMENTS

Jeng-Dar Ko

Person

Patents Grantslast 30 patents

Electrically stackable semiconductor wafer and chip packages

Wafer leveled chip packaging structure and method thereof

Wafer-leveled chip packaging structure and method thereof

Semiconductor package device

Electronic device package and method of manufacturing the same

Electronic device package and method of manufacturing the same

Wafer-leveled chip packaging structure and method thereof

Wafer-leveled chip packaging structure and method thereof

Patents Applicationslast 30 patents

Wafer Leveled Chip Packaging Structure and Method Thereof

Wafer Leveled Chip Packaging Structure and Method Thereof

WAFER-LEVELED CHIP PACKAGING STRUCTURE AND METHOD THEREOF

ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

Wafer-leveled chip packaging structure and method thereof

Wafer-leveled chip packaging structure and method thereof

Electronic device package and method of manufacturing the same

Wafer-leveled chip packaging structure and method thereof