Jenn-Gang Chern

Person

Redwood City, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient digital duty cycle adjusters
- Patent number 10,153,758
- Issue date Dec 11, 2018
- SK Hynix Inc.
- Chun-Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Temperature sensing apparatus
- Patent number 9,977,453
- Issue date May 22, 2018
- SK Hynix Inc.
- Jenn-Gang Chern
- G05 - CONTROLLING REGULATING
Information Patent Grant
Low power bias scheme for mobile storage SOC
- Patent number 9,804,615
- Issue date Oct 31, 2017
- SK hynix memory solutions inc.
- Jenn-Gang Chern
- G05 - CONTROLLING REGULATING
Information Patent Grant
Start-up circuit for bandgap reference
- Patent number 9,710,010
- Issue date Jul 18, 2017
- SK hynix memory solutions inc.
- Chun-Ju Shen
- G05 - CONTROLLING REGULATING
Information Patent Grant
Calibration device and memory system having the same
- Patent number 9,660,647
- Issue date May 23, 2017
- SK hynix memory solutions inc.
- Jenn-Gang Chern
- G05 - CONTROLLING REGULATING
Information Patent Grant
Apparatus for correcting gain error of analog-to-digital converter
- Patent number 9,660,659
- Issue date May 23, 2017
- SK hynix memory solutions inc.
- Jenn-Gang Chern
- G05 - CONTROLLING REGULATING
Information Patent Grant
Driver structure for chip-to-chip communications
- Patent number 9,653,129
- Issue date May 16, 2017
- SK hynix memory solutions inc.
- Chun-Ju Shen
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay locked loop (DLL) locked to a programmable phase
- Patent number 9,602,111
- Issue date Mar 21, 2017
- SK hynix memory solutions inc.
- Chun-Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset cancellation by biasing the body of a transistor
- Patent number 8,400,337
- Issue date Mar 19, 2013
- Link—A—Media Devices Corporation
- Danfeng Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset compensation scheme using a DAC
- Patent number 8,350,736
- Issue date Jan 8, 2013
- Link—A—Media Devices Corporation
- Jenn-Gang Chern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset compensation scheme using a DAC
- Patent number 7,852,244
- Issue date Dec 14, 2010
- Link—A—Media Devices Corporation
- Jenn-Gang Chern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset compensation scheme using a DAC
- Patent number 7,528,752
- Issue date May 5, 2009
- Link—A—Media Devices Corporation
- Jenn-Gang Chern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Serial data link using decision feedback equalization
- Patent number 7,440,497
- Issue date Oct 21, 2008
- LSI Corporation
- Vishnu Balan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for reducing using feed forward compensation
- Patent number 6,236,257
- Issue date May 22, 2001
- LSI Logic Corporation
- Xiaomin Si
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
EFFICIENT DIGITAL DUTY CYCLE ADJUSTERS
- Publication number 20170310316
- Publication date Oct 26, 2017
- SK HYNIX MEMORY SOLUTIONS INC.
- Chun-Ju SHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
START-UP CIRCUIT FOR BANDGAP REFERENCE
- Publication number 20170012609
- Publication date Jan 12, 2017
- SK HYNIX MEMORY SOLUTIONS INC.
- Chun-Ju SHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS FOR CORRECTING GAIN ERROR OF ANALOG-TO-DIGITAL CONVERTER
- Publication number 20160336948
- Publication date Nov 17, 2016
- SK HYNIX MEMORY SOLUTIONS INC.
- Jenn-Gang CHERN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEMPERATURE SENSING APPARATUS
- Publication number 20160322976
- Publication date Nov 3, 2016
- SK HYNIX MEMORY SOLUTIONS INC.
- Jenn-Gang CHERN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DRIVER STRUCTURE FOR CHIP-TO-CHIP COMMUNICATIONS
- Publication number 20160180897
- Publication date Jun 23, 2016
- SK HYNIX MEMORY SOLUTIONS INC.
- Chun-Ju SHEN
- G11 - INFORMATION STORAGE
Information Patent Application
CALIBRATION DEVICE AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20160118984
- Publication date Apr 28, 2016
- Jenn-Gang Chern
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER BIAS SCHEME FOR MOBILE STORAGE SOC
- Publication number 20160103459
- Publication date Apr 14, 2016
- SK HYNIX MEMORY SOLUTIONS INC.
- Jenn-Gang Chern
- G05 - CONTROLLING REGULATING
Information Patent Application
OFFSET COMPENSATION SCHEME USING A DAC
- Publication number 20110115659
- Publication date May 19, 2011
- LINK_A_MEDIA DEVICES CORPORATION
- Jenn-Gang Chern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Offset compensation scheme using a DAC
- Publication number 20100019943
- Publication date Jan 28, 2010
- Link_A_Media Devices Corporation
- Jenn-Gang Chern
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Serial data link using decision feedback equalization
- Publication number 20060093028
- Publication date May 4, 2006
- LSI Logic Corporation
- Vishnu Balan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jenn-Gang Chern

Person

Patents Grantslast 30 patents

Efficient digital duty cycle adjusters

Temperature sensing apparatus

Low power bias scheme for mobile storage SOC

Start-up circuit for bandgap reference

Calibration device and memory system having the same

Apparatus for correcting gain error of analog-to-digital converter

Driver structure for chip-to-chip communications

Delay locked loop (DLL) locked to a programmable phase

Offset cancellation by biasing the body of a transistor

Offset compensation scheme using a DAC

Offset compensation scheme using a DAC

Offset compensation scheme using a DAC

Serial data link using decision feedback equalization

Method and apparatus for reducing using feed forward compensation

Patents Applicationslast 30 patents

EFFICIENT DIGITAL DUTY CYCLE ADJUSTERS

START-UP CIRCUIT FOR BANDGAP REFERENCE

APPARATUS FOR CORRECTING GAIN ERROR OF ANALOG-TO-DIGITAL CONVERTER

TEMPERATURE SENSING APPARATUS

DRIVER STRUCTURE FOR CHIP-TO-CHIP COMMUNICATIONS

CALIBRATION DEVICE AND MEMORY SYSTEM HAVING THE SAME

LOW POWER BIAS SCHEME FOR MOBILE STORAGE SOC

OFFSET COMPENSATION SCHEME USING A DAC

Offset compensation scheme using a DAC

Serial data link using decision feedback equalization