Ji Xu

Person

Watervliet, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optimization of physical cell placement for integrated circuits
- Patent number 11,714,944
- Issue date Aug 1, 2023
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
And optimization of physical cell placement
- Patent number 10,936,778
- Issue date Mar 2, 2021
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design systems and methods
- Patent number 10,339,254
- Issue date Jul 2, 2019
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design systems and methods
- Patent number 9,959,380
- Issue date May 1, 2018
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for fabricating integrated circuits using directed self-ass...
- Patent number 9,613,807
- Issue date Apr 4, 2017
- GLOBALFOUNDRIES, INC.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall image templates for directed self-assembly materials
- Patent number 9,508,562
- Issue date Nov 29, 2016
- GLOBALFOUNDRIES Inc.
- Ji Xu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for fabricating integrated circuits using designs of integr...
- Patent number 9,305,834
- Issue date Apr 5, 2016
- GLOBALFOUNDRIES, INC.
- Azat Latypov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits using directed self-ass...
- Patent number 9,275,896
- Issue date Mar 1, 2016
- GLOBALFOUNDRIES, INC.
- Deniz Elizabeth Civay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal layer enabling directed self-assembly semiconductor layout de...
- Patent number 9,012,270
- Issue date Apr 21, 2015
- GLOBALFOUNDRIES Inc.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric templates for forming non-periodic patterns using direct...
- Patent number 8,956,808
- Issue date Feb 17, 2015
- GLOBALFOUNDRIES Inc.
- Gerard M. Schmid
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optimizing lithographic processes using laser annealing techniques
- Patent number 8,889,343
- Issue date Nov 18, 2014
- GLOBALFOUNDRIES Inc.
- Moshe E Preil
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for fabricating integrated circuits including formation of...
- Patent number 8,853,101
- Issue date Oct 7, 2014
- GLOBALFOUNDRIES, INC.
- Richard A. Farrell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical and physical templates for forming patterns using directed...
- Patent number 8,790,522
- Issue date Jul 29, 2014
- GLOBALFOUNDRIES Inc.
- Gerard M. Schmid
- B44 - DECORATIVE ARTS

Patents Applicationslast 30 patents

Information Patent Application
DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT
- Publication number 20190080036
- Publication date Mar 14, 2019
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS
- Publication number 20180247006
- Publication date Aug 30, 2018
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS
- Publication number 20170277818
- Publication date Sep 28, 2017
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASS...
- Publication number 20160035565
- Publication date Feb 4, 2016
- GLOBALFOUNDRIES, Inc.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASS...
- Publication number 20160027685
- Publication date Jan 28, 2016
- GLOBAL FOUNDRIES, INC.
- Deniz Elizabeth Civay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIDEWALL IMAGE TEMPLATES FOR DIRECTED SELF-ASSEMBLY MATERIALS
- Publication number 20150380252
- Publication date Dec 31, 2015
- GLOBALFOUNDRIES INC.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SURFACE TREAT...
- Publication number 20150303055
- Publication date Oct 22, 2015
- GLOBALFOUNDRIES, Inc.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECTED SELF-ASSEMBLY (DSA) FORMULATIONS USED TO FORM DSA-BASED LI...
- Publication number 20140377965
- Publication date Dec 25, 2014
- Gerard M. Schmid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL LAYER ENABLING DIRECTED SELF-ASSEMBLY SEMICONDUCTOR LAYOUT DE...
- Publication number 20140264461
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Ji XU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING FORMATION OF...
- Publication number 20140273511
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES, Inc.
- Richard A. Farrell
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
CHEMICAL AND PHYSICAL TEMPLATES FOR FORMING PATTERNS USING DIRECTED...
- Publication number 20140224764
- Publication date Aug 14, 2014
- GLOBALFOUNDRIES INC.
- Gerard M. Schmid
- B44 - DECORATIVE ARTS
Information Patent Application
OPTIMIZING LITHOGRAPHIC PROCESSES USING LASER ANNEALING TECHNIQUES
- Publication number 20140178824
- Publication date Jun 26, 2014
- GLOBALFOUNDRIES INC.
- Moshe E Preil
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
ASYMMETRIC TEMPLATES FOR FORMING NON-PERIODIC PATTERNS USING DIRECT...
- Publication number 20140154630
- Publication date Jun 5, 2014
- Gerard M. Schmid
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Person

Patents Grantslast 30 patents

Optimization of physical cell placement for integrated circuits

And optimization of physical cell placement

Integrated circuit design systems and methods

Integrated circuit design systems and methods

Methods for fabricating integrated circuits using directed self-ass...

Sidewall image templates for directed self-assembly materials

Methods for fabricating integrated circuits using designs of integr...

Methods for fabricating integrated circuits using directed self-ass...

Metal layer enabling directed self-assembly semiconductor layout de...

Asymmetric templates for forming non-periodic patterns using direct...

Optimizing lithographic processes using laser annealing techniques

Methods for fabricating integrated circuits including formation of...

Chemical and physical templates for forming patterns using directed...

Patents Applicationslast 30 patents

DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT

INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS

INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS

METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASS...

METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASS...

SIDEWALL IMAGE TEMPLATES FOR DIRECTED SELF-ASSEMBLY MATERIALS

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SURFACE TREAT...

DIRECTED SELF-ASSEMBLY (DSA) FORMULATIONS USED TO FORM DSA-BASED LI...

METAL LAYER ENABLING DIRECTED SELF-ASSEMBLY SEMICONDUCTOR LAYOUT DE...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING FORMATION OF...

CHEMICAL AND PHYSICAL TEMPLATES FOR FORMING PATTERNS USING DIRECTED...

OPTIMIZING LITHOGRAPHIC PROCESSES USING LASER ANNEALING TECHNIQUES

ASYMMETRIC TEMPLATES FOR FORMING NON-PERIODIC PATTERNS USING DIRECT...