Jiangqi He

Person

Mesa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Shielding a connector to reduce interference
- Patent number 9,318,850
- Issue date Apr 19, 2016
- Intel Corporation
- Xiang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Self referencing pin
- Patent number 8,465,297
- Issue date Jun 18, 2013
- Intel Corporation
- Bin Zou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-chip assembly with optically coupled die
- Patent number 8,189,361
- Issue date May 29, 2012
- Intel Corporation
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming compliant contact pads for semiconductor packages
- Patent number 8,148,805
- Issue date Apr 3, 2012
- Intel Corporation
- Qing Zhou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated capacitors in package-level structures, processes of mak...
- Patent number 7,989,916
- Issue date Aug 2, 2011
- Intel Corporation
- John J. Tang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Substrate with raised edge pads
- Patent number 7,980,865
- Issue date Jul 19, 2011
- Intel Corporation
- Wei Shi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Forming compliant contact pads for semiconductor packages
- Patent number 7,939,922
- Issue date May 10, 2011
- Intel Corporation
- Qing Zhou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Packaged spiral inductor structures, processes of making same, and...
- Patent number 7,852,189
- Issue date Dec 14, 2010
- Intel Corporation
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip assembly with optically coupled die
- Patent number 7,851,809
- Issue date Dec 14, 2010
- Intel Corporation
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual heat spreader panel assembly method for bumpless die-attach pa...
- Patent number 7,723,164
- Issue date May 25, 2010
- Intel Corporation
- Daoqiang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate with lossy material insert
- Patent number 7,714,430
- Issue date May 11, 2010
- Intel Corporation
- Xiang Yin Zeng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package level noise isolation
- Patent number 7,709,934
- Issue date May 4, 2010
- Intel Corporation
- Xiang Yin Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated capacitors in package-level structures, processes of mak...
- Patent number 7,670,919
- Issue date Mar 2, 2010
- Intel Corporation
- John J. Tang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Dual-chip integrated heat spreader assembly, packages containing sa...
- Patent number 7,659,143
- Issue date Feb 9, 2010
- Intel Corporation
- Jiamiao Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with chip-side signal connections
- Patent number 7,611,924
- Issue date Nov 3, 2009
- Intel Corporation
- Joong-Ho Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
I/O Architecture for integrated circuit package
- Patent number 7,589,414
- Issue date Sep 15, 2009
- Intel Corporation
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip assembly with optically coupled die
- Patent number 7,564,066
- Issue date Jul 21, 2009
- Intel Corporation
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic assembly with stacked IC's using two or more different c...
- Patent number 7,554,203
- Issue date Jun 30, 2009
- Intel Corporation
- Qing A Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming compliant contact pads for semiconductor packages
- Patent number 7,538,019
- Issue date May 26, 2009
- Intel Corporation
- Qing Zhou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Reducing parasitic mutual capacitances
- Patent number 7,535,080
- Issue date May 19, 2009
- Intel Corporation
- Xiang Yin Zeng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Reducing input capacitance of high speed integrated circuits
- Patent number 7,535,689
- Issue date May 19, 2009
- Intel Corporation
- Xiang Yin Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual die package with high-speed interconnect
- Patent number 7,511,359
- Issue date Mar 31, 2009
- Intel Corporation
- John J. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package level integration of antenna and RF front-end module
- Patent number 7,477,197
- Issue date Jan 13, 2009
- Intel Corporation
- Xiang Yin Zeng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated micro-channels for 3D through silicon architectures
- Patent number 7,432,592
- Issue date Oct 7, 2008
- Intel Corporation
- Wei Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transmission line impedance matching
- Patent number 7,432,779
- Issue date Oct 7, 2008
- Intel Corporation
- Hyunjun Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit board with trace configuration for high-speed digital diffe...
- Patent number 7,417,872
- Issue date Aug 26, 2008
- Intel Corporation
- Yuan-Liang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Chip-to-chip optical interconnect
- Patent number 7,373,033
- Issue date May 13, 2008
- Intel Corporation
- Daoqiang Lu
- G02 - OPTICS
Information Patent Grant
Vertical capacitor apparatus, systems, and methods
- Patent number 7,352,557
- Issue date Apr 1, 2008
- Intel Corporation
- Hyunjun Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package to provide high-bandwidth communication...
- Patent number 7,348,678
- Issue date Mar 25, 2008
- Intel Corporation
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array capacitor apparatuses to filter input/output signal
- Patent number 7,348,661
- Issue date Mar 25, 2008
- Intel Corporation
- Hyunjun Kim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Shielding A Connector To Reduce Interference
- Publication number 20150340817
- Publication date Nov 26, 2015
- Xiang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF REFERENCING PIN
- Publication number 20120077357
- Publication date Mar 29, 2012
- Bin Zou
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Substrate With Raised Edge Pads
- Publication number 20110239454
- Publication date Oct 6, 2011
- Wei Shi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Forming Compliant Contact Pads for Semiconductor Packages
- Publication number 20110175230
- Publication date Jul 21, 2011
- Qing Zhou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MULTI-CHIP ASSEMBLY WITH OPTICALLY COUPLED DIE
- Publication number 20110058419
- Publication date Mar 10, 2011
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated capacitors in package-level structures, processes of mak...
- Publication number 20100059858
- Publication date Mar 11, 2010
- John J. Tang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Forming Compliant Contact Pads For Semiconductor Packages
- Publication number 20090200681
- Publication date Aug 13, 2009
- Qing Zhou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Package Including a Microprocessor & Fourth Level Cache
- Publication number 20090039482
- Publication date Feb 12, 2009
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing input capacitance for high speed integrated circuits
- Publication number 20080316662
- Publication date Dec 25, 2008
- Xiang Yin Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE LEVEL INTEGRATION OF ANTENNA AND RF FRONT-END MODULE
- Publication number 20080158063
- Publication date Jul 3, 2008
- Xiang Yin ZENG
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Double side stacked die package
- Publication number 20080157322
- Publication date Jul 3, 2008
- Jia Miao Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package level noise isolation
- Publication number 20080157294
- Publication date Jul 3, 2008
- Xiang Yin Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH CHIP-SIDE SIGNAL CONNECTIONS
- Publication number 20080131997
- Publication date Jun 5, 2008
- Joong-Ho Kim
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Substrate with lossy material insert
- Publication number 20080102565
- Publication date May 1, 2008
- Xiang Yin Zeng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
I/O ARCHITECTURE FOR INTEGRATED CIRCUIT PACKAGE
- Publication number 20080088009
- Publication date Apr 17, 2008
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-CHIP INTEGRATED HEAT SPREADER ASSEMBLY, PACKAGES CONTAINING SA...
- Publication number 20080079144
- Publication date Apr 3, 2008
- Jiamiao Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL HEAT SPREADER PANEL ASSEMBLY METHOD FOR BUMPLESS DIE-ATTACH PA...
- Publication number 20080054448
- Publication date Mar 6, 2008
- Daoqiang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC ASSEMBLY WITH STACKED IC'S USING TWO OR MORE DIFFERENT C...
- Publication number 20080003717
- Publication date Jan 3, 2008
- Qing A. Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP-TO-CHIP OPTICAL INTERCONNECT
- Publication number 20070297713
- Publication date Dec 27, 2007
- Daoqiang Lu
- G02 - OPTICS
Information Patent Application
INTEGRATED INDUCTORS AND COMPLIANT INTERCONNECTS FOR SEMICONDUCTOR...
- Publication number 20070290362
- Publication date Dec 20, 2007
- Rockwell Hsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transmission line impedance matching
- Publication number 20070188262
- Publication date Aug 16, 2007
- Hyunjun Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Edge interconnects for die stacking
- Publication number 20070158807
- Publication date Jul 12, 2007
- Daoqiang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated capacitors in package-level structures, processes of mak...
- Publication number 20070158818
- Publication date Jul 12, 2007
- John J. Tang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DATA SIGNAL INTERCONNECTION WITH REDUCED CROSSTALK
- Publication number 20070155195
- Publication date Jul 5, 2007
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaged spiral inductor structures, processes of making same, and...
- Publication number 20070152796
- Publication date Jul 5, 2007
- Jiangqi He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate with raised edge pads
- Publication number 20070155198
- Publication date Jul 5, 2007
- Wei Shi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Fluxless heat spreader bonding with cold form solder
- Publication number 20070152321
- Publication date Jul 5, 2007
- Wei Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual die package with high-speed interconnect
- Publication number 20070152312
- Publication date Jul 5, 2007
- Intel Corporation
- John J. Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plating bar design for high speed package design
- Publication number 20070145543
- Publication date Jun 28, 2007
- Xiang Yin Zeng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Complementary inductor structures
- Publication number 20070146105
- Publication date Jun 28, 2007
- Xiang Yin Zeng
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Shielding a connector to reduce interference

Self referencing pin

Multi-chip assembly with optically coupled die

Forming compliant contact pads for semiconductor packages

Integrated capacitors in package-level structures, processes of mak...

Substrate with raised edge pads

Forming compliant contact pads for semiconductor packages

Packaged spiral inductor structures, processes of making same, and...

Multi-chip assembly with optically coupled die

Dual heat spreader panel assembly method for bumpless die-attach pa...

Substrate with lossy material insert

Package level noise isolation

Integrated capacitors in package-level structures, processes of mak...

Dual-chip integrated heat spreader assembly, packages containing sa...

Integrated circuit package with chip-side signal connections

I/O Architecture for integrated circuit package

Multi-chip assembly with optically coupled die

Electronic assembly with stacked IC's using two or more different c...

Forming compliant contact pads for semiconductor packages

Reducing parasitic mutual capacitances

Reducing input capacitance of high speed integrated circuits

Dual die package with high-speed interconnect

Package level integration of antenna and RF front-end module

Integrated micro-channels for 3D through silicon architectures

Transmission line impedance matching

Circuit board with trace configuration for high-speed digital diffe...

Chip-to-chip optical interconnect

Vertical capacitor apparatus, systems, and methods

Integrated circuit package to provide high-bandwidth communication...

Array capacitor apparatuses to filter input/output signal

Patents Applicationslast 30 patents

Shielding A Connector To Reduce Interference

SELF REFERENCING PIN

Substrate With Raised Edge Pads

Forming Compliant Contact Pads for Semiconductor Packages

MULTI-CHIP ASSEMBLY WITH OPTICALLY COUPLED DIE

Integrated capacitors in package-level structures, processes of mak...

Forming Compliant Contact Pads For Semiconductor Packages

Package Including a Microprocessor & Fourth Level Cache

Reducing input capacitance for high speed integrated circuits

PACKAGE LEVEL INTEGRATION OF ANTENNA AND RF FRONT-END MODULE

Double side stacked die package

Package level noise isolation

INTEGRATED CIRCUIT PACKAGE WITH CHIP-SIDE SIGNAL CONNECTIONS

Substrate with lossy material insert

I/O ARCHITECTURE FOR INTEGRATED CIRCUIT PACKAGE

DUAL-CHIP INTEGRATED HEAT SPREADER ASSEMBLY, PACKAGES CONTAINING SA...

DUAL HEAT SPREADER PANEL ASSEMBLY METHOD FOR BUMPLESS DIE-ATTACH PA...

ELECTRONIC ASSEMBLY WITH STACKED IC'S USING TWO OR MORE DIFFERENT C...

CHIP-TO-CHIP OPTICAL INTERCONNECT

INTEGRATED INDUCTORS AND COMPLIANT INTERCONNECTS FOR SEMICONDUCTOR...

Transmission line impedance matching

Edge interconnects for die stacking

Integrated capacitors in package-level structures, processes of mak...

DATA SIGNAL INTERCONNECTION WITH REDUCED CROSSTALK

Packaged spiral inductor structures, processes of making same, and...

Substrate with raised edge pads

Fluxless heat spreader bonding with cold form solder

Dual die package with high-speed interconnect

Plating bar design for high speed package design

Complementary inductor structures