Jiongxin Lu

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Scalable extreme large size substrate integration
- Patent number 11,404,337
- Issue date Aug 2, 2022
- Apple Inc.
- Kunzhong Hu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BONDING STRUCTURES IN SEMICONDUCTOR PACKAGES
- Publication number 20250015027
- Publication date Jan 9, 2025
- Apple Inc.
- Jiongxin LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Upside-Down DRAM Package Structure
- Publication number 20240315054
- Publication date Sep 19, 2024
- Apple Inc.
- Jiongxin Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D Package with Chip-on-Reconstituted Wafer or Reconstituted Wafer-...
- Publication number 20240105702
- Publication date Mar 28, 2024
- Apple Inc.
- Chonghua Zhong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D Package with Chip-on-Reconstituted Wafer or Reconstituted Wafer-...
- Publication number 20240105704
- Publication date Mar 28, 2024
- Apple Inc.
- Chonghua Zhong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally Enhanced Chip-on-Wafer or Wafer-on-Wafer Bonding
- Publication number 20240105545
- Publication date Mar 28, 2024
- Apple Inc.
- Jiongxin Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Scalable Extreme Large Size Substrate Integration
- Publication number 20230017445
- Publication date Jan 19, 2023
- Apple Inc.
- Kunzhong Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Scalable Extreme Large Size Substrate Integration
- Publication number 20210202332
- Publication date Jul 1, 2021
- Apple Inc.
- Kunzhong Hu
- H01 - BASIC ELECTRIC ELEMENTS

Jiongxin Lu

Person

Patents Grantslast 30 patents

Scalable extreme large size substrate integration

Patents Applicationslast 30 patents

BONDING STRUCTURES IN SEMICONDUCTOR PACKAGES

Upside-Down DRAM Package Structure

3D Package with Chip-on-Reconstituted Wafer or Reconstituted Wafer-...

3D Package with Chip-on-Reconstituted Wafer or Reconstituted Wafer-...

Thermally Enhanced Chip-on-Wafer or Wafer-on-Wafer Bonding

Scalable Extreme Large Size Substrate Integration

Scalable Extreme Large Size Substrate Integration