Jiunn-Ren Hwang

Person

Tai-Chung City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Antenna structure with integrated coupling element and semiconducto...
- Patent number 10,916,854
- Issue date Feb 9, 2021
- Mediatek Inc.
- Jiunn-Nan Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Digital circuit
- Patent number 9,543,943
- Issue date Jan 10, 2017
- Mediatek Inc.
- Yuan-Hung Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dummy pattern design for thermal annealing
- Patent number 8,772,056
- Issue date Jul 8, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Li-Ting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a SONOS gate structure with dual-thickness oxide
- Patent number 8,653,576
- Issue date Feb 18, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy pattern design for thermal annealing
- Patent number 8,618,610
- Issue date Dec 31, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Li-Ting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory array with a selector connected to multiple resistive cells
- Patent number 8,173,990
- Issue date May 8, 2012
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device having a generally L-shaped cross-sectio...
- Patent number 7,847,335
- Issue date Dec 7, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device with polysilicon spacer and method of fo...
- Patent number 7,714,376
- Issue date May 11, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory array with a selector connected to multiple resistive cells
- Patent number 7,663,134
- Issue date Feb 16, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
SONOS type two-bit FinFET flash memory cell
- Patent number 7,589,387
- Issue date Sep 15, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jiunn-Ren Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Manufacturing of memory array and periphery
- Patent number 7,482,231
- Issue date Jan 27, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for a sidewall SONOS memory device
- Patent number 7,482,236
- Issue date Jan 27, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for a sidewall SONOS memory device
- Patent number 7,405,119
- Issue date Jul 29, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile floating gate memory cells with polysilicon storage do...
- Patent number 7,355,236
- Issue date Apr 8, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor MOS transistor device
- Patent number 7,326,622
- Issue date Feb 5, 2008
- United Microelectronics Corp.
- Yi-Cheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical proximity correction method
- Patent number 7,297,450
- Issue date Nov 20, 2007
- United Microelectronics Corp.
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for patterning HfO2-containing dielectric
- Patent number 7,186,657
- Issue date Mar 6, 2007
- United Microelectronics Corp.
- Jeng-Huey Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned conductive spacer process for sidewall control gate of...
- Patent number 7,176,084
- Issue date Feb 13, 2007
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical proximity correction method
- Patent number 7,063,923
- Issue date Jun 20, 2006
- United Electronics Corp.
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of correcting a mask layout
- Patent number 6,974,650
- Issue date Dec 13, 2005
- United Microelectronics Corp.
- Kay Ming Lee
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Structure of a trapezoid-triple-gate FET
- Patent number 6,853,031
- Issue date Feb 8, 2005
- United Microelectronics Corp.
- Wen-Shiang Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photolithography process with multiple exposures
- Patent number 6,839,126
- Issue date Jan 4, 2005
- United Microelectronics Corp.
- Yeong-Song Yen
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Correcting the polygon feature pattern with an optical proximity co...
- Patent number 6,767,679
- Issue date Jul 27, 2004
- United Microelectronics Corp.
- Chang-Jyh Hsieh
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming opening in wafer layer
- Patent number 6,680,163
- Issue date Jan 20, 2004
- United Microelectronics Corp.
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of forming opening in wafer layer
- Patent number 6,664,028
- Issue date Dec 16, 2003
- United Microelectronics Corp.
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Multiple resist layer photolithographic process
- Patent number 6,656,667
- Issue date Dec 2, 2003
- United Microelectronics Corp.
- I-Hsiung Huang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optical mask correction method
- Patent number 6,638,664
- Issue date Oct 28, 2003
- United Microelectronics Corp.
- Chang-Jyh Hsieh
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optical proximity correction of pattern on photoresist through spac...
- Patent number 6,613,485
- Issue date Sep 2, 2003
- United Microelectronics Crop.
- Jui-Tsen Huang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming dual damascene structure
- Patent number 6,589,881
- Issue date Jul 8, 2003
- United Microelectronics Corp.
- I-Hsiung Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene manufacturing process
- Patent number 6,579,790
- Issue date Jun 17, 2003
- United Microelectronics, Corp.
- I-Hsiung Huang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ANTENNA STRUCTURE WITH INTEGRATED COUPLING ELEMENT AND SEMICONDUCTO...
- Publication number 20190305428
- Publication date Oct 3, 2019
- MEDIATEK INC.
- Jiunn-Nan Hwang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DIGITAL CIRCUIT
- Publication number 20160065182
- Publication date Mar 3, 2016
- MEDIATEK INC.
- Yuan-Hung Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUMMY PATTERN DESIGN FOR THERMAL ANNEALING
- Publication number 20140106538
- Publication date Apr 17, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Li-Ting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dummy Pattern Design for Thermal Annealing
- Publication number 20110156149
- Publication date Jun 30, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Li-Ting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sidewall SONOS Gate Structure with Dual-Thickness Oxide and Method...
- Publication number 20100136779
- Publication date Jun 3, 2010
- Taiwan Semiconductor Manufacturing Co., LTD
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Array with a Selector Connected to Multiple Resistive Cells
- Publication number 20100117045
- Publication date May 13, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Array with a Selector Connected to Multiple Resistive Cells
- Publication number 20090014836
- Publication date Jan 15, 2009
- Tzyh-Cheang Lee
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE WITH POLYSILICON SPACER AND METHOD OF FO...
- Publication number 20080142867
- Publication date Jun 19, 2008
- Taiwan Semiconductor Manufacturing Co., LTD
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for a sidewall SONOS non-volatile memory device
- Publication number 20070238237
- Publication date Oct 11, 2007
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for a sidewall SONOS memory device
- Publication number 20070212841
- Publication date Sep 13, 2007
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THEREOF
- Publication number 20070170500
- Publication date Jul 26, 2007
- United Microelectronics Corp.
- YI-CHENG (ALEX) LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacturing of memory array and periphery
- Publication number 20070161174
- Publication date Jul 12, 2007
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for a sidewall SONOS memory device
- Publication number 20070161195
- Publication date Jul 12, 2007
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile floating gate memory cells with polysilicon storage do...
- Publication number 20070145465
- Publication date Jun 28, 2007
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC
- Publication number 20070117304
- Publication date May 24, 2007
- Jeng-Huey Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned conductive spacer process for sidewall control gate of...
- Publication number 20070096200
- Publication date May 3, 2007
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure with silicon on insulator
- Publication number 20070090491
- Publication date Apr 26, 2007
- United Microelectronics Corp.
- Jiunn-Ren Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SONOS type two-bit FinFET flash memory cell
- Publication number 20070076477
- Publication date Apr 5, 2007
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jiunn-Ren Hwang
- G11 - INFORMATION STORAGE
Information Patent Application
Sidewall SONOS gate structure with dual-thickness oxide and method...
- Publication number 20070075385
- Publication date Apr 5, 2007
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure and method for forming thereof
- Publication number 20060286730
- Publication date Dec 21, 2006
- Yi-Cheng Liu (Alex Liu)
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONDUCTIVE SPACER PROCESS FOR SIDEWALL CONTROL GATE OF...
- Publication number 20060281254
- Publication date Dec 14, 2006
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tzyh-Cheang Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL PROXIMITY CORRECTION METHOD
- Publication number 20060183031
- Publication date Aug 17, 2006
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR MOS TRANSISTOR DEVICE
- Publication number 20060099763
- Publication date May 11, 2006
- Yi-Cheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR MOS TRANSISTOR DEVICE
- Publication number 20060094195
- Publication date May 4, 2006
- Yi-Cheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC
- Publication number 20060019451
- Publication date Jan 26, 2006
- Jeng-Huey Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC
- Publication number 20060019452
- Publication date Jan 26, 2006
- Jeng-Huey Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL PROXIMITY CORRECTION METHOD
- Publication number 20050009344
- Publication date Jan 13, 2005
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Structure of a Trapezoid-Triple-Gate FET
- Publication number 20040206990
- Publication date Oct 21, 2004
- Wen-Shiang Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure with silicon on insulator
- Publication number 20040195622
- Publication date Oct 7, 2004
- United Microelectronics Corp.
- Jiunn-Ren Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL PROXIMITY CORRECTION METHOD
- Publication number 20040194050
- Publication date Sep 30, 2004
- Jiunn-Ren Hwang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Jiunn-Ren Hwang

Person

Patents Grantslast 30 patents

Antenna structure with integrated coupling element and semiconducto...

Digital circuit

Dummy pattern design for thermal annealing

Method of fabricating a SONOS gate structure with dual-thickness oxide

Dummy pattern design for thermal annealing

Memory array with a selector connected to multiple resistive cells

Non-volatile memory device having a generally L-shaped cross-sectio...

Non-volatile memory device with polysilicon spacer and method of fo...

Memory array with a selector connected to multiple resistive cells

SONOS type two-bit FinFET flash memory cell

Manufacturing of memory array and periphery

Structure and method for a sidewall SONOS memory device

Structure and method for a sidewall SONOS memory device

Non-volatile floating gate memory cells with polysilicon storage do...

Method of manufacturing semiconductor MOS transistor device

Optical proximity correction method

Method for patterning HfO2-containing dielectric

Self-aligned conductive spacer process for sidewall control gate of...

Optical proximity correction method

Method of correcting a mask layout

Structure of a trapezoid-triple-gate FET

Photolithography process with multiple exposures

Correcting the polygon feature pattern with an optical proximity co...

Method of forming opening in wafer layer

Method of forming opening in wafer layer

Multiple resist layer photolithographic process

Optical mask correction method

Optical proximity correction of pattern on photoresist through spac...

Method of forming dual damascene structure

Dual damascene manufacturing process

Patents Applicationslast 30 patents

ANTENNA STRUCTURE WITH INTEGRATED COUPLING ELEMENT AND SEMICONDUCTO...

DIGITAL CIRCUIT

DUMMY PATTERN DESIGN FOR THERMAL ANNEALING

Dummy Pattern Design for Thermal Annealing

Sidewall SONOS Gate Structure with Dual-Thickness Oxide and Method...

Memory Array with a Selector Connected to Multiple Resistive Cells

Memory Array with a Selector Connected to Multiple Resistive Cells

NON-VOLATILE MEMORY DEVICE WITH POLYSILICON SPACER AND METHOD OF FO...

Structure and method for a sidewall SONOS non-volatile memory device

Structure and method for a sidewall SONOS memory device

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THEREOF

Manufacturing of memory array and periphery

Structure and method for a sidewall SONOS memory device

Non-volatile floating gate memory cells with polysilicon storage do...

METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC

Self-aligned conductive spacer process for sidewall control gate of...

Semiconductor structure with silicon on insulator

SONOS type two-bit FinFET flash memory cell

Sidewall SONOS gate structure with dual-thickness oxide and method...

Semiconductor structure and method for forming thereof

SELF-ALIGNED CONDUCTIVE SPACER PROCESS FOR SIDEWALL CONTROL GATE OF...

OPTICAL PROXIMITY CORRECTION METHOD

METHOD OF MANUFACTURING SEMICONDUCTOR MOS TRANSISTOR DEVICE

METHOD OF MANUFACTURING SEMICONDUCTOR MOS TRANSISTOR DEVICE

METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC

METHOD FOR PATTERNING HFO2-CONTAINING DIELECTRIC

OPTICAL PROXIMITY CORRECTION METHOD

Structure of a Trapezoid-Triple-Gate FET

Semiconductor structure with silicon on insulator

OPTICAL PROXIMITY CORRECTION METHOD