Joe M. Jeddeloh

Person

Shoreview, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 11,915,774
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Access unit and management segment memory operations
- Patent number 11,868,267
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 11,769,534
- Issue date Sep 26, 2023
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory management
- Patent number 11,556,465
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 11,450,354
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Access unit and management segment memory operations
- Patent number 11,301,391
- Issue date Apr 12, 2022
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 11,145,384
- Issue date Oct 12, 2021
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Stripe mapping in memory
- Patent number 11,042,441
- Issue date Jun 22, 2021
- Micron Technology, Inc.
- Edward McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 11,031,049
- Issue date Jun 8, 2021
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory management
- Patent number 10,922,221
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode memory device and method having stacked memory dice, a l...
- Patent number 10,892,003
- Issue date Jan 12, 2021
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for memory testing and repair
- Patent number 10,878,933
- Issue date Dec 29, 2020
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access unit and management segment memory operations
- Patent number 10,817,430
- Issue date Oct 27, 2020
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 10,714,150
- Issue date Jul 14, 2020
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Power interrupt management
- Patent number 10,564,690
- Issue date Feb 18, 2020
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods having memory tier structure and recursivel...
- Patent number 10,445,025
- Issue date Oct 15, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked memory devices, systems, and methods
- Patent number 10,430,086
- Issue date Oct 1, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 10,347,356
- Issue date Jul 9, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stripe mapping in memory
- Patent number 10,339,005
- Issue date Jul 2, 2019
- Micron Technology, Inc.
- Edward McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switched interface stacked-die memory architecture
- Patent number 10,297,340
- Issue date May 21, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 10,283,172
- Issue date May 7, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 10,242,718
- Issue date Mar 26, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-mode memory device and method having stacked memory dice, a l...
- Patent number 10,109,343
- Issue date Oct 23, 2018
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switched interface stacked-die memory architecture
- Patent number 10,037,818
- Issue date Jul 31, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked memory devices, systems, and methods
- Patent number 9,990,144
- Issue date Jun 5, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 9,953,724
- Issue date Apr 24, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for memory testing and repair
- Patent number 9,934,870
- Issue date Apr 3, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing systems, memory controllers and methods for controlling...
- Patent number 9,904,489
- Issue date Feb 27, 2018
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power interrupt management
- Patent number 9,874,918
- Issue date Jan 23, 2018
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switched interface stacked-die memory architecture
- Patent number 9,875,814
- Issue date Jan 23, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
STACKED MEMORY DEVICES, SYSTEMS, AND METHODS
- Publication number 20240345737
- Publication date Oct 17, 2024
- Lodestar Licensing Group, LLC
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20230080130
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS
- Publication number 20220222181
- Publication date Jul 14, 2022
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
- Publication number 20220027236
- Publication date Jan 27, 2022
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20210295879
- Publication date Sep 23, 2021
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MANAGEMENT
- Publication number 20210165738
- Publication date Jun 3, 2021
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20200411064
- Publication date Dec 31, 2020
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS
- Publication number 20200394140
- Publication date Dec 17, 2020
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED MEMORY DEVICES, SYSTEMS, AND METHODS
- Publication number 20200201550
- Publication date Jun 25, 2020
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS
- Publication number 20200104263
- Publication date Apr 2, 2020
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
- Publication number 20200058363
- Publication date Feb 20, 2020
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20190385646
- Publication date Dec 19, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
STRIPE MAPPING IN MEMORY
- Publication number 20190324847
- Publication date Oct 24, 2019
- Micron Technology, Inc.
- Edward McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT
- Publication number 20190303283
- Publication date Oct 3, 2019
- Micron Technology, Inc.
- Edward C. McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-MODE MEMORY DEVICE AND METHOD HAVING STACKED MEMORY DICE, A L...
- Publication number 20180374530
- Publication date Dec 27, 2018
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
- Publication number 20180374557
- Publication date Dec 27, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE
- Publication number 20180358111
- Publication date Dec 13, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED MEMORY DEVICES, SYSTEMS, AND METHODS
- Publication number 20180341412
- Publication date Nov 29, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR MEMORY TESTING AND REPAIR
- Publication number 20180190367
- Publication date Jul 5, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE
- Publication number 20180114587
- Publication date Apr 26, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER INTERRUPT MANAGEMENT
- Publication number 20180101209
- Publication date Apr 12, 2018
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRIPE MAPPING IN MEMORY
- Publication number 20170357467
- Publication date Dec 14, 2017
- Micron Technology, Inc.
- Edward McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20170352388
- Publication date Dec 7, 2017
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-MODE MEMORY DEVICE AND METHOD HAVING STACKED MEMORY DICE, A L...
- Publication number 20170249984
- Publication date Aug 31, 2017
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE DEVICE ACCESSING A STACK OF MEMORY DICE AND A SOLID STATE...
- Publication number 20170115893
- Publication date Apr 27, 2017
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRIPE MAPPING IN MEMORY
- Publication number 20160364181
- Publication date Dec 15, 2016
- Micron Technology, Inc.
- Edward McGlaughlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE
- Publication number 20160260503
- Publication date Sep 8, 2016
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS POWER CONTROL
- Publication number 20160086639
- Publication date Mar 24, 2016
- Micron Technology, Inc.
- Joseph M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR MEMORY TESTING AND REPAIR
- Publication number 20150380109
- Publication date Dec 31, 2015
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE POWER MANAGERS AND METHODS
- Publication number 20150357010
- Publication date Dec 10, 2015
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G06 - COMPUTING CALCULATING COUNTING

Joe M. Jeddeloh

Person

Patents Grantslast 30 patents

Memory devices and methods for managing error regions

Access unit and management segment memory operations

Flexible memory system with a controller and a stack of memory

Memory management

Flexible memory system with a controller and a stack of memory

Access unit and management segment memory operations

Memory devices and methods for managing error regions

Stripe mapping in memory

Flexible memory system with a controller and a stack of memory

Memory management

Multi-mode memory device and method having stacked memory dice, a l...

Apparatuses and methods for memory testing and repair

Access unit and management segment memory operations

Flexible memory system with a controller and a stack of memory

Power interrupt management

Apparatuses and methods having memory tier structure and recursivel...

Stacked memory devices, systems, and methods

Memory devices and methods for managing error regions

Stripe mapping in memory

Switched interface stacked-die memory architecture

Flexible memory system with a controller and a stack of memory

Flexible memory system with a controller and a stack of memory

Multi-mode memory device and method having stacked memory dice, a l...

Switched interface stacked-die memory architecture

Stacked memory devices, systems, and methods

Memory devices and methods for managing error regions

Apparatuses and methods for memory testing and repair

Processing systems, memory controllers and methods for controlling...

Power interrupt management

Switched interface stacked-die memory architecture

Patents Applicationslast 30 patents

STACKED MEMORY DEVICES, SYSTEMS, AND METHODS

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS

MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

MEMORY MANAGEMENT

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS

STACKED MEMORY DEVICES, SYSTEMS, AND METHODS

ACCESS UNIT AND MANAGEMENT SEGMENT MEMORY OPERATIONS

MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

STRIPE MAPPING IN MEMORY

MEMORY MANAGEMENT

MULTI-MODE MEMORY DEVICE AND METHOD HAVING STACKED MEMORY DICE, A L...

MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS

SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE

STACKED MEMORY DEVICES, SYSTEMS, AND METHODS

APPARATUSES AND METHODS FOR MEMORY TESTING AND REPAIR

SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE

POWER INTERRUPT MANAGEMENT

STRIPE MAPPING IN MEMORY

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

MULTI-MODE MEMORY DEVICE AND METHOD HAVING STACKED MEMORY DICE, A L...

INTERFACE DEVICE ACCESSING A STACK OF MEMORY DICE AND A SOLID STATE...

STRIPE MAPPING IN MEMORY

SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE

APPARATUS POWER CONTROL

APPARATUSES AND METHODS FOR MEMORY TESTING AND REPAIR

MEMORY DEVICE POWER MANAGERS AND METHODS