John Costello

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile memory circuit including voltage divider with phase ch...
- Patent number 8,130,538
- Issue date Mar 6, 2012
- Altera Corporation
- Peter J. McElheny
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage tolerance emulation using voltage clamp for oxide stre...
- Patent number 7,733,159
- Issue date Jun 8, 2010
- Altera Corporation
- Rafael Camarota
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip voltage regulator using feedback on process/product parameters
- Patent number 7,639,033
- Issue date Dec 29, 2009
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
System for coupling programmable logic device to external circuitry...
- Patent number RE40011
- Issue date Jan 22, 2008
- Altera Corporation
- Nghia Tran
- 326 - Electronic digital logic circuitry
Information Patent Grant
On-chip voltage regulator using feedback on process/product parameters
- Patent number 7,170,308
- Issue date Jan 30, 2007
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable series on-chip termination impedance and impedance mat...
- Patent number 6,836,144
- Issue date Dec 28, 2004
- Altera Corporation
- John Henry Bui
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for protecting integrated circuit devices against electro...
- Patent number 6,785,109
- Issue date Aug 31, 2004
- Altera Corporation
- Cheng H. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for margin testing single polysilicon EEPROM c...
- Patent number 6,781,883
- Issue date Aug 24, 2004
- Altera Corporation
- Raminda U. Madurawe
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for margin testing single polysilicon EEPROM c...
- Patent number 6,646,919
- Issue date Nov 11, 2003
- Altera Corporation
- Raminda U. Madurawe
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output drivers
- Patent number 6,369,613
- Issue date Apr 9, 2002
- Altera Corporation
- John Costello
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device macrocell with improved logic capability
- Patent number 6,366,119
- Issue date Apr 2, 2002
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for margin testing single polysilicon EEPROM c...
- Patent number 6,268,623
- Issue date Jul 31, 2001
- Altera Corporation
- Raminda U. Madurawe
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing I/O noise when leaving programming mode
- Patent number 6,242,941
- Issue date Jun 5, 2001
- Altera Corporation
- W. Bradley Vest
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage pump scheme incorporating an overlapping clock
- Patent number 6,236,260
- Issue date May 22, 2001
- Altera Corporation
- William B. Vest
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for reducing output ground and power bounce noise
- Patent number 6,184,703
- Issue date Feb 6, 2001
- Altera Corporation
- William B. Vest
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device macrocell with improved logic capability
- Patent number 6,157,208
- Issue date Dec 5, 2000
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage pump circuit with reduced oxide stress
- Patent number 6,072,358
- Issue date Jun 6, 2000
- Altera Corporation
- Chuan-Yung Hung
- G11 - INFORMATION STORAGE
Information Patent Grant
System for coupling programmable logic device to external circuitry...
- Patent number 5,970,255
- Issue date Oct 19, 1999
- Altera Corporation
- Nghia Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage ramp rate control circuit
- Patent number 5,945,870
- Issue date Aug 31, 1999
- Altera Corporation
- Michael H. Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Biasing scheme for reducing stress and improving reliability in EEP...
- Patent number 5,905,675
- Issue date May 18, 1999
- Altera Corporation
- Raminda U. Madurawe
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device macrocell with improved capability
- Patent number 5,861,760
- Issue date Jan 19, 1999
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier with individually optimized high and low power modes
- Patent number 5,850,365
- Issue date Dec 15, 1998
- Altera Corporation
- Dirk A. Reese
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for monitoring or forcing an internal node in...
- Patent number 5,821,771
- Issue date Oct 13, 1998
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage pump scheme incorporating an overlapping clock
- Patent number 5,793,246
- Issue date Aug 11, 1998
- Altera Corporation
- William B. Vest
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry and methods for erasing EEPROM transistors
- Patent number 5,732,020
- Issue date Mar 24, 1998
- Altera Corporation
- Myron Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with feedback and stabilization
- Patent number 5,525,917
- Issue date Jun 11, 1996
- Altera Corporation
- Myron W. Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device with logic block outputs coupled to adjac...
- Patent number 5,483,178
- Issue date Jan 9, 1996
- Altera Corporation
- John C. Costello
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY CIRCUIT INCLUDING VOLTAGE DIVIDER WITH PHASE CH...
- Publication number 20100177560
- Publication date Jul 15, 2010
- Altera Corporation
- Peter J. McElheny
- G11 - INFORMATION STORAGE
Information Patent Application
On-chip voltage regulator using feedback on process/product parameters
- Publication number 20070085558
- Publication date Apr 19, 2007
- Irfan Rahim
- H03 - BASIC ELECTRONIC CIRCUITRY

John Costello

Person

Patents Grantslast 30 patents

Non-volatile memory circuit including voltage divider with phase ch...

High voltage tolerance emulation using voltage clamp for oxide stre...

On-chip voltage regulator using feedback on process/product parameters

System for coupling programmable logic device to external circuitry...

On-chip voltage regulator using feedback on process/product parameters

Programmable series on-chip termination impedance and impedance mat...

Technique for protecting integrated circuit devices against electro...

Apparatus and method for margin testing single polysilicon EEPROM c...

Apparatus and method for margin testing single polysilicon EEPROM c...

Input/output drivers

Programmable logic device macrocell with improved logic capability

Apparatus and method for margin testing single polysilicon EEPROM c...

Reducing I/O noise when leaving programming mode

High voltage pump scheme incorporating an overlapping clock

Method and circuit for reducing output ground and power bounce noise

Programmable logic device macrocell with improved logic capability

High voltage pump circuit with reduced oxide stress

System for coupling programmable logic device to external circuitry...

Voltage ramp rate control circuit

Biasing scheme for reducing stress and improving reliability in EEP...

Programmable logic device macrocell with improved capability

Sense amplifier with individually optimized high and low power modes

Method and apparatus for monitoring or forcing an internal node in...

High voltage pump scheme incorporating an overlapping clock

Circuitry and methods for erasing EEPROM transistors

Sense amplifier with feedback and stabilization

Programmable logic device with logic block outputs coupled to adjac...

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY CIRCUIT INCLUDING VOLTAGE DIVIDER WITH PHASE CH...

On-chip voltage regulator using feedback on process/product parameters