John M. Nystuen

Person

Burnsville, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache system for managing various cache line conditions
- Patent number 9,235,521
- Issue date Jan 12, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Gary M. Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing cache line allocations for multiple issue processors
- Patent number 8,095,734
- Issue date Jan 10, 2012
- LSI Corporation
- Gary Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
AMBA modular memory controller
- Patent number 7,793,008
- Issue date Sep 7, 2010
- LSI Corporation
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for self-adjusting input delay in DDR-based me...
- Patent number 7,366,862
- Issue date Apr 29, 2008
- LSI Logic Corporation
- John M. Nystuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
AMBA modular memory controller
- Patent number 7,114,041
- Issue date Sep 26, 2006
- LSI Logic Corporation
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDR SDRAM memory controller with multiple dependency request archit...
- Patent number 6,842,821
- Issue date Jan 11, 2005
- LSI Logic Corporation
- John Nystuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arbitration within a multiport AMBA slave
- Patent number 6,799,304
- Issue date Sep 28, 2004
- LSI Logic Corporation
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synchronization of read data in a read dat...
- Patent number 6,603,706
- Issue date Aug 5, 2003
- LSI Logic Corporation
- John M. Nystuen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CACHE SYSTEM FOR MANAGING VARIOUS CACHE LINE CONDITIONS
- Publication number 20150026411
- Publication date Jan 22, 2015
- LSI Corporation
- Gary M. Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING CACHE LINE ALLOCATIONS FOR MULTIPLE ISSUE PROCESSORS
- Publication number 20100281219
- Publication date Nov 4, 2010
- Gary Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AMBA modular memory controller
- Publication number 20060190658
- Publication date Aug 24, 2006
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for self-adjusting input delay in DDR-based me...
- Publication number 20060107011
- Publication date May 18, 2006
- LSI Logic Corporation
- John M. Nystuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AMBA modular memory controller
- Publication number 20040123036
- Publication date Jun 24, 2004
- LSI Logic Corporation
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR SDRAM memory controller with multiple dependency request archit...
- Publication number 20040107324
- Publication date Jun 3, 2004
- John Nystuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-mode memory controller
- Publication number 20040088472
- Publication date May 6, 2004
- John M. Nystuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arbitration within a multiport AMBA slave
- Publication number 20040064615
- Publication date Apr 1, 2004
- LSI Logic Corporation
- Gregory F. Hammitt
- G06 - COMPUTING CALCULATING COUNTING

John M. Nystuen

Person

Patents Grantslast 30 patents

Cache system for managing various cache line conditions

Managing cache line allocations for multiple issue processors

AMBA modular memory controller

Method and apparatus for self-adjusting input delay in DDR-based me...

AMBA modular memory controller

DDR SDRAM memory controller with multiple dependency request archit...

Arbitration within a multiport AMBA slave

Method and apparatus for synchronization of read data in a read dat...

Patents Applicationslast 30 patents

CACHE SYSTEM FOR MANAGING VARIOUS CACHE LINE CONDITIONS

MANAGING CACHE LINE ALLOCATIONS FOR MULTIPLE ISSUE PROCESSORS

AMBA modular memory controller

Method and apparatus for self-adjusting input delay in DDR-based me...

AMBA modular memory controller

DDR SDRAM memory controller with multiple dependency request archit...

Multi-mode memory controller

Arbitration within a multiport AMBA slave