John Samuel Liberty

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reduced system memory latency via a variable latency interface
- Patent number 11,372,703
- Issue date Jun 28, 2022
- International Business Machines Corporation
- John Samuel Liberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing bias in hardware generated random numbers
- Patent number 8,918,443
- Issue date Dec 23, 2014
- International Business Machines Corporation
- John S. Liberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing bias in hardware generated random numbers
- Patent number 8,918,442
- Issue date Dec 23, 2014
- International Business Machines Corporation
- John S. Liberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded programmable direct memory access engine
- Patent number 8,918,553
- Issue date Dec 23, 2014
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security architecture for system on chip
- Patent number 8,838,950
- Issue date Sep 16, 2014
- International Business Machines Corporation
- David John Craft
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for security in electronically fused encryption keys
- Patent number 8,230,495
- Issue date Jul 24, 2012
- International Business Machines Corporation
- Robert W. Berry, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multithreaded programmable direct memory access engine
- Patent number 8,230,136
- Issue date Jul 24, 2012
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating gammacorrected antialiased lines
- Patent number 7,986,330
- Issue date Jul 26, 2011
- International Business Machines Corporation
- Daniel Alan Brokenshire
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Channel mechanisms for communicating with a processor event facility
- Patent number 7,930,457
- Issue date Apr 19, 2011
- International Business Machines Corporation
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random number generator
- Patent number 7,890,561
- Issue date Feb 15, 2011
- International Business Machines Corporation
- David William Boerstler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multithreaded programmable direct memory access engine
- Patent number 7,870,309
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable direct memory access engine
- Patent number 7,870,308
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating instructions and data between a processor and externa...
- Patent number 7,869,459
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Michael N. Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for tracking messages between a processing unit a...
- Patent number 7,836,222
- Issue date Nov 16, 2010
- International Business Machines Corporation
- Michael Norman Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for communicating instructions and data between a processor...
- Patent number 7,778,271
- Issue date Aug 17, 2010
- International Business Machines Corporation
- Michael N. Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System for limiting the size of a local storage of a processor
- Patent number 7,730,279
- Issue date Jun 1, 2010
- International Business Machines Corporation
- Adam P. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for limiting the size of a local storage of a processor
- Patent number 7,533,238
- Issue date May 12, 2009
- International Business Machines Corporation
- Adam P. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for communicating with a processor event facility
- Patent number 7,500,039
- Issue date Mar 3, 2009
- International Business Machines Corporation
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validating chip configuration data
- Patent number 7,496,692
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Ingemar Holm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of functionality testing for a ring oscillator
- Patent number 7,279,996
- Issue date Oct 9, 2007
- International Business Machines Corporation
- David William Boerstler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Oscillator array with row and column control
- Patent number 7,233,212
- Issue date Jun 19, 2007
- International Business Machines Corporation
- David William Boerstler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lowered PU power usage method and apparatus
- Patent number 7,197,655
- Issue date Mar 27, 2007
- International Business Machines Corporation
- Brian King Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ring-topology based multiprocessor data access bus
- Patent number 7,043,579
- Issue date May 9, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symmetric multiprocessor coherence mechanism
- Patent number 6,760,819
- Issue date Jul 6, 2004
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block rendering method for a graphics subsystem
- Patent number 6,421,053
- Issue date Jul 16, 2002
- International Business Machines Corporation
- Charles Ray Johns
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REDUCING BIAS IN HARDWARE GENERATED RANDOM NUMBERS
- Publication number 20140059099
- Publication date Feb 27, 2014
- International Business Machines Corporation
- John S. Liberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING BIAS IN HARDWARE GENERATED RANDOM NUMBERS
- Publication number 20140059100
- Publication date Feb 27, 2014
- International Business Machines Corporation
- John S. Liberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreaded Programmable Direct Memory Access Engine
- Publication number 20120246354
- Publication date Sep 27, 2012
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreaded Programmable Direct Memory Access Engine
- Publication number 20110066769
- Publication date Mar 17, 2011
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SECURITY IN ELECTRONICALLY FUSED ENCRYPTION KEYS
- Publication number 20100250943
- Publication date Sep 30, 2010
- International Business Machines Corporation
- Robert W. Berry, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreaded Programmable Direct Memory Access Engine
- Publication number 20100161846
- Publication date Jun 24, 2010
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Direct Memory Access Engine
- Publication number 20100161848
- Publication date Jun 24, 2010
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communicating with a Processor Event Facility
- Publication number 20090217300
- Publication date Aug 27, 2009
- International Business Machines Corporation
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System for Limiting the Size of a Local Storage of a Processor
- Publication number 20090204781
- Publication date Aug 13, 2009
- International Business Machines Corporation
- Adam P. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure For A Processor System With Background Error Handl...
- Publication number 20090070654
- Publication date Mar 12, 2009
- International Business Machines Corporation
- Brian Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communicating Instructions and Data Between a Processor and Externa...
- Publication number 20080288757
- Publication date Nov 20, 2008
- International Business Machines Corporation
- Michael N. Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Processor system and methodology with background error handling fea...
- Publication number 20070186135
- Publication date Aug 9, 2007
- Brian Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for validating chip configuration data
- Publication number 20070094420
- Publication date Apr 26, 2007
- Ingemar Holm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for communicating instructions and data between a...
- Publication number 20070041403
- Publication date Feb 22, 2007
- Michael N. Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for communicating with a processor event facility
- Publication number 20070043936
- Publication date Feb 22, 2007
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of functionality testing for a ring oscillator
- Publication number 20070040620
- Publication date Feb 22, 2007
- David William Boerstler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Random number generator
- Publication number 20070043798
- Publication date Feb 22, 2007
- David William Boerstler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for limiting the size of a local storage of a pro...
- Publication number 20070043926
- Publication date Feb 22, 2007
- Adam P. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Oscillator array with row and column control
- Publication number 20060220753
- Publication date Oct 5, 2006
- David William Boerstler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Store scan data in trace arrays for on-board software access
- Publication number 20060080583
- Publication date Apr 13, 2006
- International Business Machines Corporation
- John Samuel Liberty
- G01 - MEASURING TESTING
Information Patent Application
Performance count tracing
- Publication number 20060005083
- Publication date Jan 5, 2006
- International Business Machines Corporation
- Michael Joseph Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Security architecture for system on chip
- Publication number 20050021944
- Publication date Jan 27, 2005
- International Business Machines Corporation
- David John Craft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lowered PU power usage method and apparatus
- Publication number 20040268164
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Brian King Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
External message passing method and apparatus
- Publication number 20040264445
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Michael Norman Day
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Ring-topology based multiprocessor data access bus
- Publication number 20040111546
- Publication date Jun 10, 2004
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Symmetric multiprocessor coherence mechanism
- Publication number 20030005237
- Publication date Jan 2, 2003
- International Business Machines Corp.
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for generating gammacorrected antialiased lines
- Publication number 20020158885
- Publication date Oct 31, 2002
- Daniel Alan Brokenshire
- G06 - COMPUTING CALCULATING COUNTING

John Samuel Liberty

Person

Patents Grantslast 30 patents

Reduced system memory latency via a variable latency interface

Reducing bias in hardware generated random numbers

Reducing bias in hardware generated random numbers

Multithreaded programmable direct memory access engine

Security architecture for system on chip

Method for security in electronically fused encryption keys

Multithreaded programmable direct memory access engine

Method and apparatus for generating gammacorrected antialiased lines

Channel mechanisms for communicating with a processor event facility

Random number generator

Multithreaded programmable direct memory access engine

Programmable direct memory access engine

Communicating instructions and data between a processor and externa...

System and method for tracking messages between a processing unit a...

Method for communicating instructions and data between a processor...

System for limiting the size of a local storage of a processor

Method for limiting the size of a local storage of a processor

Method for communicating with a processor event facility

Validating chip configuration data

Method of functionality testing for a ring oscillator

Oscillator array with row and column control

Lowered PU power usage method and apparatus

Ring-topology based multiprocessor data access bus

Symmetric multiprocessor coherence mechanism

Block rendering method for a graphics subsystem

Patents Applicationslast 30 patents

REDUCING BIAS IN HARDWARE GENERATED RANDOM NUMBERS

REDUCING BIAS IN HARDWARE GENERATED RANDOM NUMBERS

Multithreaded Programmable Direct Memory Access Engine

Multithreaded Programmable Direct Memory Access Engine

METHOD FOR SECURITY IN ELECTRONICALLY FUSED ENCRYPTION KEYS

Multithreaded Programmable Direct Memory Access Engine

Programmable Direct Memory Access Engine

Communicating with a Processor Event Facility

System for Limiting the Size of a Local Storage of a Processor

Design Structure For A Processor System With Background Error Handl...

Communicating Instructions and Data Between a Processor and Externa...

Processor system and methodology with background error handling fea...

System and method for validating chip configuration data

System and method for communicating instructions and data between a...

System and method for communicating with a processor event facility

Method of functionality testing for a ring oscillator

Random number generator

System and method for limiting the size of a local storage of a pro...

Oscillator array with row and column control

Store scan data in trace arrays for on-board software access

Performance count tracing

Security architecture for system on chip

Lowered PU power usage method and apparatus

External message passing method and apparatus

Ring-topology based multiprocessor data access bus

Symmetric multiprocessor coherence mechanism

Method and apparatus for generating gammacorrected antialiased lines