Jonathan J. DeMent

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for cache-locking mechanism using translation tab...
- Patent number 8,244,979
- Issue date Aug 14, 2012
- International Business Machines Corporation
- Adam Patrick Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for security in electronically fused encryption keys
- Patent number 8,230,495
- Issue date Jul 24, 2012
- International Business Machines Corporation
- Robert W. Berry, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for cache-locking mechanism using segment table a...
- Patent number 8,099,579
- Issue date Jan 17, 2012
- International Business Machines Corporation
- Adam Patrick Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure boot across a plurality of processors
- Patent number 8,046,574
- Issue date Oct 25, 2011
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Masking a hardware boot sequence
- Patent number 8,046,573
- Issue date Oct 25, 2011
- International Business Machines Corporation
- Jason N. Dale
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Selecting a random processor to boot on a multiprocessor system
- Patent number 8,037,293
- Issue date Oct 11, 2011
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance of an in-order processor by no longer requiring a unifo...
- Patent number 8,028,151
- Issue date Sep 27, 2011
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating a worst case current waveform for testing of integrated...
- Patent number 7,917,347
- Issue date Mar 29, 2011
- International Business Machines Corporation
- Makoto Aikawa
- G01 - MEASURING TESTING
Information Patent Grant
Time-of-life counter for handling instruction flushes from a queue
- Patent number 7,913,070
- Issue date Mar 22, 2011
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus controller initiated write-through mechanism with hardware auto...
- Patent number 7,877,550
- Issue date Jan 25, 2011
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Queue design system supporting dependency checking and issue for SI...
- Patent number 7,831,808
- Issue date Nov 9, 2010
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Booting a multiprocessor device based on selection of encryption ke...
- Patent number 7,779,273
- Issue date Aug 17, 2010
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Masking a boot sequence by providing a dummy processor
- Patent number 7,774,617
- Issue date Aug 10, 2010
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Masking a boot sequence by providing a dummy processor
- Patent number 7,774,616
- Issue date Aug 10, 2010
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage identifier sorting
- Patent number 7,739,573
- Issue date Jun 15, 2010
- International Business Machines Corporation
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preloading translation buffers
- Patent number 7,711,903
- Issue date May 4, 2010
- International Business Machines Corporation
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power management in a processor design
- Patent number 7,681,056
- Issue date Mar 16, 2010
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for masking a hardware boot sequence
- Patent number 7,594,104
- Issue date Sep 22, 2009
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reducing store latency in symmetrical multipr...
- Patent number 7,519,780
- Issue date Apr 14, 2009
- International Business Machines Corporation
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-LRU virtual counter for a locking cache
- Patent number 7,516,275
- Issue date Apr 7, 2009
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time-of-life counter design for handling instruction flushes from a...
- Patent number 7,490,224
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance of an in-order processor by no longer requiring a unifo...
- Patent number 7,475,232
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus controller initiated write-through mechanism
- Patent number 7,472,229
- Issue date Dec 30, 2008
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for sorting processors based on thermal design point
- Patent number 7,447,602
- Issue date Nov 4, 2008
- International Business Machines Corporation
- Douglas H. Bradley
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic power management in a processor design
- Patent number 7,401,242
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for high frequency stall design
- Patent number 7,370,176
- Issue date May 6, 2008
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for issuing instructions from an issue queue i...
- Patent number 7,350,056
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Queue design supporting dependency checking and issue for SIMD inst...
- Patent number 7,328,330
- Issue date Feb 5, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine grained multi-thread dispatch block mechanism
- Patent number 7,313,673
- Issue date Dec 25, 2007
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of efficiently handling multiple page sizes in an effective...
- Patent number 7,159,095
- Issue date Jan 2, 2007
- International Business Machines Corporation
- Jason Nathaniel Dale
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR SECURITY IN ELECTRONICALLY FUSED ENCRYPTION KEYS
- Publication number 20100250943
- Publication date Sep 30, 2010
- International Business Machines Corporation
- Robert W. Berry, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting a Random Processor to Boot on a Multiprocessor System
- Publication number 20090327680
- Publication date Dec 31, 2009
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Generating a Worst Case Current Waveform for...
- Publication number 20090112550
- Publication date Apr 30, 2009
- Makoto Aikawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE OF AN IN-ORDER PROCESSOR BY NO LONGER REQUIRING A UNIFO...
- Publication number 20090077352
- Publication date Mar 19, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bus Controller Initiated Write-Through Mechanism with Hardware Auto...
- Publication number 20090077323
- Publication date Mar 19, 2009
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Masking a Hardware Boot Sequence
- Publication number 20090055640
- Publication date Feb 26, 2009
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Time-Of-Life Counter For Handling Instruction Flushes From A Queue
- Publication number 20090043997
- Publication date Feb 12, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Cache-Locking Mechanism Using Translation Tab...
- Publication number 20090019252
- Publication date Jan 15, 2009
- Adam Patrick Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Cache-Locking Mechanism Using Segment Table A...
- Publication number 20090019255
- Publication date Jan 15, 2009
- Adam Patrick Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Booting a Multiprocessor Device Based on Sele...
- Publication number 20080256366
- Publication date Oct 16, 2008
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secure Boot Across a Plurality of Processors
- Publication number 20080229092
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Power Management in a Processor Design
- Publication number 20080229078
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Masking a Boot Sequence by Providing a Dummy...
- Publication number 20080215874
- Publication date Sep 4, 2008
- International Business Machines Corporation
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUEUE DESIGN SYSTEM SUPPORTING DEPENDENCY CHECKING AND ISSUE FOR SI...
- Publication number 20080168261
- Publication date Jul 10, 2008
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage Identifier Sorting
- Publication number 20080168318
- Publication date Jul 10, 2008
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Frequency Stall Design
- Publication number 20080148021
- Publication date Jun 19, 2008
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Reducing Store Latency in Symmetrical Multipr...
- Publication number 20080109585
- Publication date May 8, 2008
- Jonathan J. DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimizing a Set of LBIST Patterns to Enhance Delay Fault Coverage
- Publication number 20080092006
- Publication date Apr 17, 2008
- Nikhil Dakwala
- G01 - MEASURING TESTING
Information Patent Application
System and Method for Providing a Mediated External Exception Exten...
- Publication number 20080034193
- Publication date Feb 7, 2008
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MASKING A HARDWARE BOOT SEQUENCE
- Publication number 20070300053
- Publication date Dec 27, 2007
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR POWER MANAGEMENT IN A DATA PROCESSING SYSTEM
- Publication number 20070288776
- Publication date Dec 13, 2007
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT...
- Publication number 20070288739
- Publication date Dec 13, 2007
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SELECTING A RANDOM PROCESSOR TO BOOT ON A MUL...
- Publication number 20070288738
- Publication date Dec 13, 2007
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SECURE BOOT ACROSS A PLURALITY OF PROCESSORS
- Publication number 20070288740
- Publication date Dec 13, 2007
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR BOOTING A MULTIPROCESSOR DEVICE BASED ON SELE...
- Publication number 20070288761
- Publication date Dec 13, 2007
- JASON N. DALE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY PROVIDING A DUMMY...
- Publication number 20070288762
- Publication date Dec 13, 2007
- Jason N. Dale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-LRU VIRTUAL COUNTER FOR A LOCKING CACHE
- Publication number 20070250667
- Publication date Oct 25, 2007
- JONATHAN JAMES DEMENT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for issuing instructions from an issue queue i...
- Publication number 20070198812
- Publication date Aug 23, 2007
- IBM Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for dynamically selecting storage instruction per...
- Publication number 20070118726
- Publication date May 24, 2007
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Preloading Translation Buffers
- Publication number 20070113044
- Publication date May 17, 2007
- Michael N. Day
- G06 - COMPUTING CALCULATING COUNTING

Jonathan J. DeMent

Person

Patents Grantslast 30 patents

System and method for cache-locking mechanism using translation tab...

Method for security in electronically fused encryption keys

System and method for cache-locking mechanism using segment table a...

Secure boot across a plurality of processors

Masking a hardware boot sequence

Selecting a random processor to boot on a multiprocessor system

Performance of an in-order processor by no longer requiring a unifo...

Generating a worst case current waveform for testing of integrated...

Time-of-life counter for handling instruction flushes from a queue

Bus controller initiated write-through mechanism with hardware auto...

Queue design system supporting dependency checking and issue for SI...

Booting a multiprocessor device based on selection of encryption ke...

Masking a boot sequence by providing a dummy processor

Masking a boot sequence by providing a dummy processor

Voltage identifier sorting

Preloading translation buffers

Dynamic power management in a processor design

System and method for masking a hardware boot sequence

System and method for reducing store latency in symmetrical multipr...

Pseudo-LRU virtual counter for a locking cache

Time-of-life counter design for handling instruction flushes from a...

Performance of an in-order processor by no longer requiring a unifo...

Bus controller initiated write-through mechanism

System and method for sorting processors based on thermal design point

Dynamic power management in a processor design

System and method for high frequency stall design

Method and apparatus for issuing instructions from an issue queue i...

Queue design supporting dependency checking and issue for SIMD inst...

Fine grained multi-thread dispatch block mechanism

Method of efficiently handling multiple page sizes in an effective...

Patents Applicationslast 30 patents

METHOD FOR SECURITY IN ELECTRONICALLY FUSED ENCRYPTION KEYS

Selecting a Random Processor to Boot on a Multiprocessor System

System and Method for Generating a Worst Case Current Waveform for...

PERFORMANCE OF AN IN-ORDER PROCESSOR BY NO LONGER REQUIRING A UNIFO...

Bus Controller Initiated Write-Through Mechanism with Hardware Auto...

Masking a Hardware Boot Sequence

Time-Of-Life Counter For Handling Instruction Flushes From A Queue

System and Method for Cache-Locking Mechanism Using Translation Tab...

System and Method for Cache-Locking Mechanism Using Segment Table A...

System and Method for Booting a Multiprocessor Device Based on Sele...

Secure Boot Across a Plurality of Processors

Dynamic Power Management in a Processor Design

System and Method for Masking a Boot Sequence by Providing a Dummy...

QUEUE DESIGN SYSTEM SUPPORTING DEPENDENCY CHECKING AND ISSUE FOR SI...

Voltage Identifier Sorting

High Frequency Stall Design

System and Method for Reducing Store Latency in Symmetrical Multipr...

Optimizing a Set of LBIST Patterns to Enhance Delay Fault Coverage

System and Method for Providing a Mediated External Exception Exten...

SYSTEM AND METHOD FOR MASKING A HARDWARE BOOT SEQUENCE

METHOD AND APPARATUS FOR POWER MANAGEMENT IN A DATA PROCESSING SYSTEM

SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT...

SYSTEM AND METHOD FOR SELECTING A RANDOM PROCESSOR TO BOOT ON A MUL...

SYSTEM AND METHOD FOR SECURE BOOT ACROSS A PLURALITY OF PROCESSORS

SYSTEM AND METHOD FOR BOOTING A MULTIPROCESSOR DEVICE BASED ON SELE...

SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY PROVIDING A DUMMY...

PSEUDO-LRU VIRTUAL COUNTER FOR A LOCKING CACHE

Method and apparatus for issuing instructions from an issue queue i...

System and method for dynamically selecting storage instruction per...

Method and Apparatus for Preloading Translation Buffers