Jonathan Park

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Metal configurable register file
- Patent number 9,811,628
- Issue date Nov 7, 2017
- Baysand Inc.
- Jonathan C. Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal configurable hybrid memory
- Patent number 9,590,634
- Issue date Mar 7, 2017
- Baysand Inc.
- Jonathan C. Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flexible, space-efficient I/O circuitry for integrated circuits
- Patent number 9,577,640
- Issue date Feb 21, 2017
- Baysand Inc.
- Jonathan C Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flexible, space-efficient I/O circuitry for integrated circuits
- Patent number 9,166,593
- Issue date Oct 20, 2015
- Baysand Inc.
- Jonathan C Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Gate array architecture with multiple programmable regions
- Patent number 8,788,984
- Issue date Jul 22, 2014
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible, space-efficient I/O circuitry for integrated circuits
- Patent number 8,773,163
- Issue date Jul 8, 2014
- Baysand Inc.
- Jonathan C Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital microwave radio link with a variety of ports
- Patent number 8,731,007
- Issue date May 20, 2014
- Remec Broadband Wireless, LLC
- Idan Bar-Sade
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Gate array architecture with multiple programmable regions
- Patent number 8,533,641
- Issue date Sep 10, 2013
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable vias for structured ASICs
- Patent number 8,339,844
- Issue date Dec 25, 2012
- eASIC Corporation
- Herman Schmit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wideband digital radio with transmit modulation cancellation
- Patent number 8,311,082
- Issue date Nov 13, 2012
- Bridgewave Communications, Inc.
- Eliezer Pasternak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for programming a mask-programmable logic device and device...
- Patent number 8,001,509
- Issue date Aug 16, 2011
- Altera Corporation
- Steven Perry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single via structured IC device
- Patent number 7,759,971
- Issue date Jul 20, 2010
- eASIC Corporation
- Shu Ern Perng Mark
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable via modeling
- Patent number 7,689,960
- Issue date Mar 30, 2010
- eASIC Corporation
- Jonathan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wideband digital radio with transmit modulation cancellation
- Patent number 7,469,128
- Issue date Dec 23, 2008
- Bridgewave Communications, Inc.
- Eliezer Pastemak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for programming a mask-programmable logic device and device...
- Patent number 7,290,237
- Issue date Oct 30, 2007
- Altera Corporation
- Steven Perry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switch methodology for mask-programmable logic devices
- Patent number 7,165,230
- Issue date Jan 16, 2007
- Altera Corporation
- Jonathan Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wideband digital radio with transmit modulation cancellation
- Patent number 6,937,666
- Issue date Aug 30, 2005
- Bridgewave Communications, Inc.
- Eliezer Pasternak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of creating a mask-programmed logic device from a pre-existi...
- Patent number 6,938,236
- Issue date Aug 30, 2005
- Altera Corporation
- Jonathan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing clock/buffer network in mask-pro...
- Patent number 6,886,143
- Issue date Apr 26, 2005
- Altera Corporation
- Jonathan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask-programmable logic devices with programmable gate array sites
- Patent number 6,742,172
- Issue date May 25, 2004
- Altera Corporation
- Jonathan Park
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
GATE ARRAY ARCHITECTURE WITH SCALABLE TRANSISTOR SIZE
- Publication number 20180300175
- Publication date Oct 18, 2018
- Jonathan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Gate array architecture with multiple programmable regions
- Publication number 20150048425
- Publication date Feb 19, 2015
- Baysand Inc.
- Jonathan C. Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gate array architecture with multiple programmable regions
- Publication number 20130334576
- Publication date Dec 19, 2013
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GATE ARRAY ARCHITECTURE WITH MULTIPLE PROGRAMMABLE REGIONS
- Publication number 20130087834
- Publication date Apr 11, 2013
- Jonathan C. Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital Microwave Radio Link with a Variety of Ports
- Publication number 20110081872
- Publication date Apr 7, 2011
- Bridgewave Communications, Inc.
- Idan Bar-Sade
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Single via structured IC device
- Publication number 20090109765
- Publication date Apr 30, 2009
- eASIC Corporation
- Shu Ern Perng Mark
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable Vias for Structured ASICs
- Publication number 20080224260
- Publication date Sep 18, 2008
- eASIC Corporation
- Herman Schmit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PROGRAMMING A MASK-PROGRAMMABLE LOGIC DEVICE AND DEVICE...
- Publication number 20080005716
- Publication date Jan 3, 2008
- Altera Corporation
- Steven Perry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable via modeling
- Publication number 20070174801
- Publication date Jul 26, 2007
- eASIC Corporation
- Jonathan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Switch methodology for mask-programmable logic devices
- Publication number 20050280438
- Publication date Dec 22, 2005
- Altera Corporation
- Jonathan Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Wideband digital radio with transmit modulation cancellation
- Publication number 20050094718
- Publication date May 5, 2005
- BridgeWave Communications, Inc.
- Eliezer Pastemak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Mask-programmable logic devices with programmable gate array sites
- Publication number 20040263205
- Publication date Dec 30, 2004
- Altera Corporation
- Jonathan Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for programming a mask-programmable logic device and device...
- Publication number 20040261052
- Publication date Dec 23, 2004
- ALTERA CORPORATION, a corporation of Delaware
- Steven Perry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Wideband digital radio with transmit modulation cancellation
- Publication number 20040218686
- Publication date Nov 4, 2004
- BridgeWave Communications, Inc.
- Eliezer Pastemak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Wideband digital radio with transmit modulation cancellation
- Publication number 20040120418
- Publication date Jun 24, 2004
- Eliezer Pasternak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Mask-programmable logic devices with programmable gate array sites
- Publication number 20030188287
- Publication date Oct 2, 2003
- Jonathan Park
- H03 - BASIC ELECTRONIC CIRCUITRY

Jonathan Park

Person

Patents Grantslast 30 patents

Metal configurable register file

Metal configurable hybrid memory

Flexible, space-efficient I/O circuitry for integrated circuits

Flexible, space-efficient I/O circuitry for integrated circuits

Gate array architecture with multiple programmable regions

Flexible, space-efficient I/O circuitry for integrated circuits

Digital microwave radio link with a variety of ports

Gate array architecture with multiple programmable regions

Programmable vias for structured ASICs

Wideband digital radio with transmit modulation cancellation

Method for programming a mask-programmable logic device and device...

Single via structured IC device

Programmable via modeling

Wideband digital radio with transmit modulation cancellation

Method for programming a mask-programmable logic device and device...

Switch methodology for mask-programmable logic devices

Wideband digital radio with transmit modulation cancellation

Method of creating a mask-programmed logic device from a pre-existi...

Method and apparatus for providing clock/buffer network in mask-pro...

Mask-programmable logic devices with programmable gate array sites

Patents Applicationslast 30 patents

GATE ARRAY ARCHITECTURE WITH SCALABLE TRANSISTOR SIZE

Gate array architecture with multiple programmable regions

Gate array architecture with multiple programmable regions

GATE ARRAY ARCHITECTURE WITH MULTIPLE PROGRAMMABLE REGIONS

Digital Microwave Radio Link with a Variety of Ports

Single via structured IC device

Programmable Vias for Structured ASICs

METHOD FOR PROGRAMMING A MASK-PROGRAMMABLE LOGIC DEVICE AND DEVICE...

Programmable via modeling

Switch methodology for mask-programmable logic devices

Wideband digital radio with transmit modulation cancellation

Mask-programmable logic devices with programmable gate array sites

Method for programming a mask-programmable logic device and device...

Wideband digital radio with transmit modulation cancellation

Wideband digital radio with transmit modulation cancellation

Mask-programmable logic devices with programmable gate array sites