Jonghee Han

Person

Morrisville, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Duty cycle corrector
- Patent number 7,420,399
- Issue date Sep 2, 2008
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method to synchronize signals in individual integrated c...
- Patent number 7,405,996
- Issue date Jul 29, 2008
- Infineon Technologies AG
- Alessandro Minzoni
- G11 - INFORMATION STORAGE
Information Patent Grant
Duty cycle corrector
- Patent number 7,310,010
- Issue date Dec 18, 2007
- Infineon Technologies AG
- Alessandro Minzoni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle corrector
- Patent number 7,304,517
- Issue date Dec 4, 2007
- Infineon Technologies AG
- Joonho Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duty cycle corrector
- Patent number 7,230,465
- Issue date Jun 12, 2007
- Infineon Technologies AG
- Joonho Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input return path based on Vddq/Vssq
- Patent number 7,193,883
- Issue date Mar 20, 2007
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Low rise/fall skewed input buffer compensating process variation
- Patent number 7,187,196
- Issue date Mar 6, 2007
- Infineon Technologies AG
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle detector with first, second, and third values
- Patent number 7,145,375
- Issue date Dec 5, 2006
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Input circuit having updated output signal synchronized to clock si...
- Patent number 7,123,524
- Issue date Oct 17, 2006
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with data latching circuit including a selector
- Patent number 7,120,067
- Issue date Oct 10, 2006
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Input buffer circuit including reference voltage monitoring circuit
- Patent number 7,064,586
- Issue date Jun 20, 2006
- Infineon Technologies, AG
- Jung Pill Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Random access memory with post-amble data strobe signal noise rejec...
- Patent number 7,031,205
- Issue date Apr 18, 2006
- Infineon Technologies North America Corp.
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit configuration for digitizing a signal in an inpu...
- Patent number 6,934,197
- Issue date Aug 23, 2005
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Input buffer with differential amplifier
- Patent number 6,891,763
- Issue date May 10, 2005
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual power sensing scheme for a memory device
- Patent number 6,888,767
- Issue date May 3, 2005
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit configuration for multiple charge recycling duri...
- Patent number 6,847,566
- Issue date Jan 25, 2005
- Infineon Technologies AG
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch scheme with invalid command detector
- Patent number 6,839,288
- Issue date Jan 4, 2005
- Infineon Technologies AG
- Jung Pill Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
High resolution interleaved delay chain
- Patent number 6,774,691
- Issue date Aug 10, 2004
- Infineon Technologies AG
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR ENCODING DATA
- Publication number 20090122856
- Publication date May 14, 2009
- Robert BAXTER
- G11 - INFORMATION STORAGE
Information Patent Application
System and method to synchronize signals in individual integrated c...
- Publication number 20070247960
- Publication date Oct 25, 2007
- Alessandro Minzoni
- G11 - INFORMATION STORAGE
Information Patent Application
DUTY CYCLE CORRECTOR
- Publication number 20070241799
- Publication date Oct 18, 2007
- Alessandro Minzoni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Duty cycle corrector
- Publication number 20070103216
- Publication date May 10, 2007
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Duty cycle corrector
- Publication number 20060214714
- Publication date Sep 28, 2006
- Infineon Technologies AG
- Joonho Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH DATA LATCHING CIRCUIT INCLUDING A SELECTOR
- Publication number 20060203575
- Publication date Sep 14, 2006
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Random access memory with post-amble data strobe signal noise rejec...
- Publication number 20060168470
- Publication date Jul 27, 2006
- Infineon Technologies North America Corp.
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Duty cycle corrector
- Publication number 20060152265
- Publication date Jul 13, 2006
- Joonho Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Duty cycle detector with first, second, and third values
- Publication number 20060152266
- Publication date Jul 13, 2006
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Input return path based on VDDQ/VSSQ
- Publication number 20050281074
- Publication date Dec 22, 2005
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Input buffer circuit including reference voltage monitoring circuit
- Publication number 20050134331
- Publication date Jun 23, 2005
- Jung Pill Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL POWER SENSING SCHEME FOR A MEMORY DEVICE
- Publication number 20050111274
- Publication date May 26, 2005
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Low rise/fall skewed input buffer compensating process variation
- Publication number 20050104618
- Publication date May 19, 2005
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY LOCKED LOOP PHASE BLENDER CIRCUIT
- Publication number 20050093594
- Publication date May 5, 2005
- Infineon Technologies North America Corp.
- Jung Pill Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multiple data rate bus using return clock
- Publication number 20050097291
- Publication date May 5, 2005
- Infineon Technologies North America Corp.
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Random access memory having self-adjusting off-chip driver
- Publication number 20050083766
- Publication date Apr 21, 2005
- Infineon Technologies North America Corp.
- Jung Pill Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and circuit configuration for digitizing a signal in an inpu...
- Publication number 20050078530
- Publication date Apr 14, 2005
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Random access memory with data strobe locking circuit
- Publication number 20050073901
- Publication date Apr 7, 2005
- Infineon Technologies North America Corp.
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
Random access memory with post-amble data strobe signal noise rejec...
- Publication number 20050068810
- Publication date Mar 31, 2005
- Infineon Technologies North America Corp.
- Jonghee Han
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH RESOLUTION INTERLEAVED DELAY CHAIN
- Publication number 20040130365
- Publication date Jul 8, 2004
- Infineon Technologies North Amercia Corp.
- Jonghee Han
- H03 - BASIC ELECTRONIC CIRCUITRY

Jonghee Han

Person

Patents Grantslast 30 patents

Duty cycle corrector

System and method to synchronize signals in individual integrated c...

Duty cycle corrector

Duty cycle corrector

Duty cycle corrector

Input return path based on Vddq/Vssq

Low rise/fall skewed input buffer compensating process variation

Duty cycle detector with first, second, and third values

Input circuit having updated output signal synchronized to clock si...

Memory with data latching circuit including a selector

Input buffer circuit including reference voltage monitoring circuit

Random access memory with post-amble data strobe signal noise rejec...

Method and circuit configuration for digitizing a signal in an inpu...

Input buffer with differential amplifier

Dual power sensing scheme for a memory device

Method and circuit configuration for multiple charge recycling duri...

Latch scheme with invalid command detector

High resolution interleaved delay chain

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR ENCODING DATA

System and method to synchronize signals in individual integrated c...

DUTY CYCLE CORRECTOR

Duty cycle corrector

Duty cycle corrector

MEMORY WITH DATA LATCHING CIRCUIT INCLUDING A SELECTOR

Random access memory with post-amble data strobe signal noise rejec...

Duty cycle corrector

Duty cycle detector with first, second, and third values

Input return path based on VDDQ/VSSQ

Input buffer circuit including reference voltage monitoring circuit

DUAL POWER SENSING SCHEME FOR A MEMORY DEVICE

Low rise/fall skewed input buffer compensating process variation

DELAY LOCKED LOOP PHASE BLENDER CIRCUIT

Multiple data rate bus using return clock

Random access memory having self-adjusting off-chip driver

Method and circuit configuration for digitizing a signal in an inpu...

Random access memory with data strobe locking circuit

Random access memory with post-amble data strobe signal noise rejec...

HIGH RESOLUTION INTERLEAVED DELAY CHAIN