Jose A. Cadena-Hernandez

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Wylie, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Design implementation to suppress latchup in voltage tolerant circuits
- Patent number 7,167,350
- Issue date Jan 23, 2007
- Texas Instruments Incorporated
- Jorge Salcedo-Suner
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Design implementation to suppress latchup in voltage tolerant circuits
- Publication number 20050104154
- Publication date May 19, 2005
- Jorge Salcedo-Suner
- H01 - BASIC ELECTRIC ELEMENTS