Jose A. PAREDES

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Partial ECC mechanism for a byte-write capable register
- Patent number 10,176,038
- Issue date Jan 8, 2019
- International Business Machines Corporation
- Dhivya Jeganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating ECC values for byte-write capable registers
- Patent number 9,985,656
- Issue date May 29, 2018
- International Business Machines Corporation
- Dhivya Jeganathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Generating ECC values for byte-write capable registers
- Patent number 9,985,655
- Issue date May 29, 2018
- International Business Machines Corporation
- Dhivya Jeganathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Operation of a multi-slice processor implementing simultaneous two-...
- Patent number 9,940,133
- Issue date Apr 10, 2018
- International Business Machines Corporation
- Robert A. Cordes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing simultaneous two-...
- Patent number 9,934,033
- Issue date Apr 3, 2018
- International Business Machines Corporation
- Robert A. Cordes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial ECC handling for a byte-write capable register
- Patent number 9,766,975
- Issue date Sep 19, 2017
- International Business Machines Corporation
- Dhivya Jeganathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Processor instruction retry recovery
- Patent number 7,827,443
- Issue date Nov 2, 2010
- International Business Machines Corporation
- Susan Elizabeth Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing complex logic within a memory...
- Patent number 7,683,662
- Issue date Mar 23, 2010
- International Business Machines Corporation
- Andrew James Bianchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Register file
- Patent number 7,679,973
- Issue date Mar 16, 2010
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of selective row energization based on write data
- Patent number 7,561,489
- Issue date Jul 14, 2009
- International Business Machines Corporation
- Michael J. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Transient noise detection scheme and apparatus
- Patent number 7,506,230
- Issue date Mar 17, 2009
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for checkpointing instruction groups with out-of-order float...
- Patent number 7,478,276
- Issue date Jan 13, 2009
- International Business Machines Corporation
- James Wilson Bishop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for implementing complex logic within a memory array
- Patent number 7,471,103
- Issue date Dec 30, 2008
- International Business Machines Corporation
- Andrew James Bianchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Processor instruction retry recovery
- Patent number 7,467,325
- Issue date Dec 16, 2008
- International Business Machines Corporation
- Susan Elizabeth Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file
- Patent number 7,443,737
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of selective row energization based on write data
- Patent number 7,379,348
- Issue date May 27, 2008
- Internatioanl Business Machines Corporation
- Michael J. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Leakage sensing and keeper circuit for proper operation of a dynami...
- Patent number 7,202,704
- Issue date Apr 10, 2007
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register file method incorporating read-after-write blocking using...
- Patent number 7,142,463
- Issue date Nov 28, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for selecting operating characteristics of a c...
- Patent number 7,116,569
- Issue date Oct 3, 2006
- International Business Machines Corporation
- Joaquin Hinojosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus which implements a multi-ported LRU in a multi...
- Patent number 7,085,896
- Issue date Aug 1, 2006
- International Business Machines Corporation
- Andrew James Bianchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method for guaranteeing full stuck-at-fault coverage of a memo...
- Patent number 7,073,106
- Issue date Jul 4, 2006
- International Business Machines Corporation
- Jose A. Paredes
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic-static logical control element for signaling an interval be...
- Patent number 7,015,723
- Issue date Mar 21, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register file apparatus and method incorporating read-after-write b...
- Patent number 7,012,839
- Issue date Mar 14, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multilevel register-file bit-read method and apparatus
- Patent number 7,002,860
- Issue date Feb 21, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing sub-threshold leakage in a memory array
- Patent number 6,934,181
- Issue date Aug 23, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Register-file bit-read method and apparatus
- Patent number 6,914,450
- Issue date Jul 5, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for a radiation resistant latch
- Patent number 6,826,090
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for a radiation resistant latch with integrate...
- Patent number 6,825,691
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for skipping a latch in timing-sensitive dynamic circuits of...
- Patent number 6,737,888
- Issue date May 18, 2004
- International Business Machines Corporation
- George McNeil Lattimore
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method of utilizing Alias Hit signals to detect error...
- Patent number 6,640,293
- Issue date Oct 28, 2003
- International Business Machines Corporation
- Jose Angel Paredes
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING SIMULTANEOUS TWO-...
- Publication number 20170357507
- Publication date Dec 14, 2017
- International Business Machines Corporation
- ROBERT A. CORDES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING SIMULTANEOUS TWO-...
- Publication number 20170357508
- Publication date Dec 14, 2017
- International Business Machines Corporation
- ROBERT A. CORDES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR WRITING A PORTION OF A REGISTER IN A MICRO...
- Publication number 20170109093
- Publication date Apr 20, 2017
- International Business Machines Corporation
- Sam G. CHU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL ECC MECHANISM FOR A BYTE-WRITE CAPABLE REGISTER
- Publication number 20170063401
- Publication date Mar 2, 2017
- International Business Machines Corporation
- Dhivya JEGANATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL ECC HANDLING FOR A BYTE-WRITE CAPABLE REGISTER
- Publication number 20170060678
- Publication date Mar 2, 2017
- International Business Machines Corporation
- Dhivya JEGANATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING ECC VALUES FOR BYTE-WRITE CAPABLE REGISTERS
- Publication number 20170060677
- Publication date Mar 2, 2017
- International Business Machines Corporation
- Dhivya JEGANATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING ECC VALUES FOR BYTE-WRITE CAPABLE REGISTERS
- Publication number 20170060679
- Publication date Mar 2, 2017
- International Business Machines Corporation
- Dhivya JEGANATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Instruction Retry Recovery
- Publication number 20090063898
- Publication date Mar 5, 2009
- International Business Machines Corporation
- Susan Elizabeth Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Complex Logic Within a Memory...
- Publication number 20090027079
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Andrew James Bianchi
- G11 - INFORMATION STORAGE
Information Patent Application
REGISTER FILE
- Publication number 20080279015
- Publication date Nov 13, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF SELECTIVE ROW ENERGIZATION BASED ON WRITE DATA
- Publication number 20080219063
- Publication date Sep 11, 2008
- Michael J. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR IMPLEMENTING COMPLEX LOGIC WITHIN A MEMORY...
- Publication number 20080136447
- Publication date Jun 12, 2008
- Andrew James Bianchi
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus for Floating Bitlines in Static Random Access Memory Arrays
- Publication number 20080123437
- Publication date May 29, 2008
- Vikas Agarwal
- G11 - INFORMATION STORAGE
Information Patent Application
SCANNABLE DOMINO LATCH REDUNDANCY FOR SOFT ERROR RATE PROTECTION WI...
- Publication number 20070229132
- Publication date Oct 4, 2007
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method of selective row energization based on write data
- Publication number 20070171757
- Publication date Jul 26, 2007
- Michael J. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SELECTING OPERATING CHARACTERISTICS OF A C...
- Publication number 20060181909
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Joaquin Hinojosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transient noise detection scheme and apparatus
- Publication number 20060184852
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for checkpointing instruction groups with out-of-order float...
- Publication number 20060179346
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James Wilson Bishop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor instruction retry recovery
- Publication number 20060179207
- Publication date Aug 10, 2006
- International Business Machines Corporation
- Susan Elizabeth Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Leakage sensing and keeper circuit for proper operation of a dynami...
- Publication number 20060049850
- Publication date Mar 9, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC-STATIC LOGICAL CONTROL ELEMENT FOR SIGNALING AN INTERVAL BE...
- Publication number 20060038588
- Publication date Feb 23, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REGISTER FILE APPARATUS AND METHOD INCORPORATING READ-AFTER-WRITE B...
- Publication number 20060039203
- Publication date Feb 23, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
Register file method incorporating read-after-write blocking using...
- Publication number 20060039202
- Publication date Feb 23, 2006
- International Busines Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
Register file
- Publication number 20050216698
- Publication date Sep 29, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multilevel register-file bit-read method and apparatus
- Publication number 20050099851
- Publication date May 12, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
REGISTER-FILE BIT-READ METHOD AND APPARATUS
- Publication number 20050099205
- Publication date May 12, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR A RADIATION RESISTANT LATCH WITH INTEGRATE...
- Publication number 20040250184
- Publication date Dec 9, 2004
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR A RADIATION RESISTANT LATCH
- Publication number 20040246782
- Publication date Dec 9, 2004
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus which implements a multi-ported LRU in a multi...
- Publication number 20040221108
- Publication date Nov 4, 2004
- International Business Machines Corp.
- Andrew James Bianchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Test method for guaranteeing full stuck-at-fault coverage of a memo...
- Publication number 20040199816
- Publication date Oct 7, 2004
- International Business Machines Corporation
- Jose A. Paredes
- G11 - INFORMATION STORAGE

Jose A. PAREDES

Person

Patents Grantslast 30 patents

Partial ECC mechanism for a byte-write capable register

Generating ECC values for byte-write capable registers

Generating ECC values for byte-write capable registers

Operation of a multi-slice processor implementing simultaneous two-...

Operation of a multi-slice processor implementing simultaneous two-...

Partial ECC handling for a byte-write capable register

Processor instruction retry recovery

Method and apparatus for implementing complex logic within a memory...

Register file

System and method of selective row energization based on write data

Transient noise detection scheme and apparatus

Method for checkpointing instruction groups with out-of-order float...

Method for implementing complex logic within a memory array

Processor instruction retry recovery

Register file

System and method of selective row energization based on write data

Leakage sensing and keeper circuit for proper operation of a dynami...

Register file method incorporating read-after-write blocking using...

Method and apparatus for selecting operating characteristics of a c...

Method and apparatus which implements a multi-ported LRU in a multi...

Test method for guaranteeing full stuck-at-fault coverage of a memo...

Dynamic-static logical control element for signaling an interval be...

Register file apparatus and method incorporating read-after-write b...

Multilevel register-file bit-read method and apparatus

Reducing sub-threshold leakage in a memory array

Register-file bit-read method and apparatus

Apparatus and method for a radiation resistant latch

Apparatus and method for a radiation resistant latch with integrate...

Method for skipping a latch in timing-sensitive dynamic circuits of...

Apparatus and method of utilizing Alias Hit signals to detect error...

Patents Applicationslast 30 patents

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING SIMULTANEOUS TWO-...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING SIMULTANEOUS TWO-...

METHOD AND APPARATUS FOR WRITING A PORTION OF A REGISTER IN A MICRO...

PARTIAL ECC MECHANISM FOR A BYTE-WRITE CAPABLE REGISTER

PARTIAL ECC HANDLING FOR A BYTE-WRITE CAPABLE REGISTER

GENERATING ECC VALUES FOR BYTE-WRITE CAPABLE REGISTERS

GENERATING ECC VALUES FOR BYTE-WRITE CAPABLE REGISTERS

Processor Instruction Retry Recovery

Method and Apparatus for Implementing Complex Logic Within a Memory...

REGISTER FILE

SYSTEM AND METHOD OF SELECTIVE ROW ENERGIZATION BASED ON WRITE DATA

METHOD AND APPARATUS FOR IMPLEMENTING COMPLEX LOGIC WITHIN A MEMORY...

Apparatus for Floating Bitlines in Static Random Access Memory Arrays

SCANNABLE DOMINO LATCH REDUNDANCY FOR SOFT ERROR RATE PROTECTION WI...

System and method of selective row energization based on write data

METHOD AND APPARATUS FOR SELECTING OPERATING CHARACTERISTICS OF A C...

Transient noise detection scheme and apparatus

Method for checkpointing instruction groups with out-of-order float...

Processor instruction retry recovery

Leakage sensing and keeper circuit for proper operation of a dynami...

DYNAMIC-STATIC LOGICAL CONTROL ELEMENT FOR SIGNALING AN INTERVAL BE...

REGISTER FILE APPARATUS AND METHOD INCORPORATING READ-AFTER-WRITE B...

Register file method incorporating read-after-write blocking using...

Register file

Multilevel register-file bit-read method and apparatus

REGISTER-FILE BIT-READ METHOD AND APPARATUS

APPARATUS AND METHOD FOR A RADIATION RESISTANT LATCH WITH INTEGRATE...

APPARATUS AND METHOD FOR A RADIATION RESISTANT LATCH

Method and apparatus which implements a multi-ported LRU in a multi...

Test method for guaranteeing full stuck-at-fault coverage of a memo...