Jose R. Sousa

Person

Colchester, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Folded dummy world line
- Patent number 5,841,720
- Issue date Nov 24, 1998
- International Business Machines Corporation
- James J. Covino
- G11 - INFORMATION STORAGE
Information Patent Grant
Using one memory to supply addresses to an associated memory during...
- Patent number 5,740,098
- Issue date Apr 14, 1998
- International Business Machines Corporation
- Robert Dean Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for accessing semi-associative cache memory us...
- Patent number 5,721,863
- Issue date Feb 24, 1998
- International Business Machines Corporation
- James J. Covino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for parallel addressing of CAMs and RAMs
- Patent number 5,715,188
- Issue date Feb 3, 1998
- International Business Machines Corporation
- James J. Covino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address buffer for synchronous system
- Patent number 5,625,302
- Issue date Apr 29, 1997
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Using one memory to supply addresses to an associated memory during...
- Patent number 5,563,833
- Issue date Oct 8, 1996
- International Business Machines Corporation
- Robert D. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlocked restore circuit
- Patent number 5,559,453
- Issue date Sep 24, 1996
- International Business Machines Corporation
- James J. Covino
- H03 - BASIC ELECTRONIC CIRCUITRY

Jose R. Sousa

Person

Patents Grantslast 30 patents

Folded dummy world line

Using one memory to supply addresses to an associated memory during...

Method and structure for accessing semi-associative cache memory us...

Method and apparatus for parallel addressing of CAMs and RAMs

Address buffer for synchronous system

Using one memory to supply addresses to an associated memory during...

Interlocked restore circuit