Joseph D. Wert

Person

Arlington, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for providing a low voltage thin gate input/outpu...
- Patent number 7,642,600
- Issue date Jan 5, 2010
- National Semiconductor Corporation
- Joseph D. Wert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Floating CMOS input circuit that does not draw DC current
- Patent number 7,362,126
- Issue date Apr 22, 2008
- National Semiconductor Corporation
- Joseph Douglas Wert
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for level shifting in power-on reset circuitry...
- Patent number 7,307,454
- Issue date Dec 11, 2007
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transfer gate having overvoltage protection and method
- Patent number 7,276,938
- Issue date Oct 2, 2007
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry for providing overvoltage backdrive protection
- Patent number 7,123,053
- Issue date Oct 17, 2006
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable drive strength hysteresis input circuitry
- Patent number 7,042,264
- Issue date May 9, 2006
- National Semiconductor Corporation
- Joseph Douglas Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short circuit protection apparatus with self-clocking self-clearing...
- Patent number 6,960,940
- Issue date Nov 1, 2005
- National Semiconductor Corporation
- Joseph D. Wert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry for providing overvoltage backdrive protection
- Patent number 6,906,553
- Issue date Jun 14, 2005
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for level shifting in power-on reset circuitry...
- Patent number 6,894,537
- Issue date May 17, 2005
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-up detection circuit with low current draw for dual power sup...
- Patent number 6,853,221
- Issue date Feb 8, 2005
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short circuit protection apparatus with self-clocking self-clearing...
- Patent number 6,731,139
- Issue date May 4, 2004
- National Semiconductor Corporation
- Joseph D. Wert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extended voltage range level shifter
- Patent number 6,700,407
- Issue date Mar 2, 2004
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Double translation voltage level shifter and method
- Patent number 6,683,485
- Issue date Jan 27, 2004
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual purpose low power input circuit for a memory device interface
- Patent number 6,552,569
- Issue date Apr 22, 2003
- National Semiconductor Corporation
- Joseph Douglas Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System for generating a reference voltage
- Patent number 6,534,806
- Issue date Mar 18, 2003
- National Semiconductor Corporation
- Joseph D. Wert
- G11 - INFORMATION STORAGE
Information Patent Grant
Gate oxide protection method
- Patent number 6,437,958
- Issue date Aug 20, 2002
- National Semiconductor Corporation
- Richard L. Duncan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage level shifter with high impedance tri-state output and meth...
- Patent number 6,384,631
- Issue date May 7, 2002
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable high speed quiet I/O cell
- Patent number 6,281,706
- Issue date Aug 28, 2001
- National Semiconductor Corp.
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast overvoltage protected pad input circuit
- Patent number 6,271,703
- Issue date Aug 7, 2001
- National Semiconductor Corporation
- Joseph Douglas Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input structure for I/O device
- Patent number 6,194,944
- Issue date Feb 27, 2001
- National Semiconductor Corporation
- Joseph Douglas Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage translator with gate oxide breakdown protection
- Patent number 6,127,848
- Issue date Oct 3, 2000
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Gate oxide breakdown protection circuit for deep submicron processes
- Patent number 6,081,412
- Issue date Jun 27, 2000
- National Semiconductor Corporation
- Richard L. Duncan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for connecting a node to a voltage source selected from alt...
- Patent number 5,568,065
- Issue date Oct 22, 1996
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Overvoltage protection
- Patent number 5,555,149
- Issue date Sep 10, 1996
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage translation and overvoltage protection
- Patent number 5,534,795
- Issue date Jul 9, 1996
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage translation and overvoltage protection
- Patent number 5,406,140
- Issue date Apr 11, 1995
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Signal bus line driver circuit
- Patent number 5,247,207
- Issue date Sep 21, 1993
- National Semiconductor Corporation
- Joseph D. Wert
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Dual purpose low power input circuit for a memory device interface
- Publication number 20020079922
- Publication date Jun 27, 2002
- Joseph Douglas Wert
- H03 - BASIC ELECTRONIC CIRCUITRY

Joseph D. Wert

Person

Patents Grantslast 30 patents

System and method for providing a low voltage thin gate input/outpu...

Floating CMOS input circuit that does not draw DC current

Apparatus and method for level shifting in power-on reset circuitry...

Transfer gate having overvoltage protection and method

Circuitry for providing overvoltage backdrive protection

Variable drive strength hysteresis input circuitry

Short circuit protection apparatus with self-clocking self-clearing...

Circuitry for providing overvoltage backdrive protection

Apparatus and method for level shifting in power-on reset circuitry...

Power-up detection circuit with low current draw for dual power sup...

Short circuit protection apparatus with self-clocking self-clearing...

Extended voltage range level shifter

Double translation voltage level shifter and method

Dual purpose low power input circuit for a memory device interface

System for generating a reference voltage

Gate oxide protection method

Voltage level shifter with high impedance tri-state output and meth...

Programmable high speed quiet I/O cell

Fast overvoltage protected pad input circuit

Input structure for I/O device

Voltage translator with gate oxide breakdown protection

Gate oxide breakdown protection circuit for deep submicron processes

Circuit for connecting a node to a voltage source selected from alt...

Overvoltage protection

Voltage translation and overvoltage protection

Voltage translation and overvoltage protection

Signal bus line driver circuit

Patents Applicationslast 30 patents

Dual purpose low power input circuit for a memory device interface