Joseph Karniewicz

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hierarchical semiconductor design
- Patent number 7,096,446
- Issue date Aug 22, 2006
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameter population of cells of a hierarchical semiconductor struc...
- Patent number 6,922,659
- Issue date Jul 26, 2005
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical semiconductor design
- Patent number 6,449,757
- Issue date Sep 10, 2002
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 6,404,018
- Issue date Jun 11, 2002
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static memory cell and method of forming static memory cell
- Patent number 6,184,539
- Issue date Feb 6, 2001
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 6,140,685
- Issue date Oct 31, 2000
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 5,976,926
- Issue date Nov 2, 1999
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 5,780,906
- Issue date Jul 14, 1998
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a novel static memory cell having a tunnel...
- Patent number 5,770,497
- Issue date Jun 23, 1998
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 5,757,051
- Issue date May 26, 1998
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method to control threshold voltage by modifying implant dosage usi...
- Patent number 5,739,058
- Issue date Apr 14, 1998
- Micron Technology, Inc.
- Joe Karniewicz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a novel static memory cell having a tunnel...
- Patent number 5,672,536
- Issue date Sep 30, 1997
- Micron Technology, Inc.
- Jeff Zhiqiang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static memory cell and method of manufacturing a static memory cell
- Patent number 5,629,546
- Issue date May 13, 1997
- Micron Technology, Inc.
- Jeff Z. Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for forming high-value inter-nodal coupling resistance fo...
- Patent number 5,135,882
- Issue date Aug 4, 1992
- Micron Technology, Inc.
- Joseph J. Karniewicz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced-mask, split-polysilicon CMOS process, incorporating stacked...
- Patent number 5,134,085
- Issue date Jul 28, 1992
- Micron Technology, Inc.
- Brent D. Gilgen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for creating two thicknesses of gate oxide within a dynamic...
- Patent number 5,057,449
- Issue date Oct 15, 1991
- Micron Technology, Inc.
- Tyler A. Lowrey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-polysilicon CMOS DRAM process incorporating selective self-al...
- Patent number 5,030,585
- Issue date Jul 9, 1991
- Micron Technology, Inc.
- Fernando Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split-polysilicon CMOS DRAM process incorporating self-aligned sili...
- Patent number 5,026,657
- Issue date Jun 25, 1991
- Micron Technology, Inc.
- Ruojia Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIERARCHIAL SEMICONDUCTOR DESIGN
- Publication number 20060253809
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHIAL SEMICONDUCTOR DESIGN
- Publication number 20060253827
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical semiconductor design
- Publication number 20030005400
- Publication date Jan 2, 2003
- Micron Technology, Inc.
- Joseph J. Karniewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHIAL SEMICONDUCTOR DESIGN
- Publication number 20020023255
- Publication date Feb 21, 2002
- JOSEPH J. KARNIEWICZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARAMETER POPULATION OF CELLS OF A HIERARCHICAL SEMICONDUCTOR STRUC...
- Publication number 20010044927
- Publication date Nov 22, 2001
- JOSEPH J. KARNIEWICZ
- G06 - COMPUTING CALCULATING COUNTING

Joseph Karniewicz

Person

Patents Grantslast 30 patents

Hierarchical semiconductor design

Parameter population of cells of a hierarchical semiconductor struc...

Hierarchical semiconductor design

Static memory cell and method of manufacturing a static memory cell

Static memory cell and method of forming static memory cell

Static memory cell and method of manufacturing a static memory cell

Static memory cell and method of manufacturing a static memory cell

Static memory cell and method of manufacturing a static memory cell

Method of manufacturing a novel static memory cell having a tunnel...

Static memory cell and method of manufacturing a static memory cell

Method to control threshold voltage by modifying implant dosage usi...

Method of manufacturing a novel static memory cell having a tunnel...

Static memory cell and method of manufacturing a static memory cell

Technique for forming high-value inter-nodal coupling resistance fo...

Reduced-mask, split-polysilicon CMOS process, incorporating stacked...

Process for creating two thicknesses of gate oxide within a dynamic...

Split-polysilicon CMOS DRAM process incorporating selective self-al...

Split-polysilicon CMOS DRAM process incorporating self-aligned sili...

Patents Applicationslast 30 patents

HIERARCHIAL SEMICONDUCTOR DESIGN

HIERARCHIAL SEMICONDUCTOR DESIGN

Hierarchical semiconductor design

HIERARCHIAL SEMICONDUCTOR DESIGN

PARAMETER POPULATION OF CELLS OF A HIERARCHICAL SEMICONDUCTOR STRUC...