Joseph Michael Sullivan

Person

Wappingers Falls, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a multichip module having chips on two sides
- Patent number 6,973,715
- Issue date Dec 13, 2005
- International Business Machines Corporation
- Ajay Prabhakar Giri
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multichip module having chips on two sides
- Patent number 6,765,152
- Issue date Jul 20, 2004
- International Business Machines Corporation
- Ajay Prabhakar Giri
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Process for forming a multi-level thin-film electronic packaging st...
- Patent number 6,678,949
- Issue date Jan 20, 2004
- International Business Machines Corporation
- Chandrika Prasad
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Process for electroplating pins of an integrated circuit package
- Patent number 6,527,935
- Issue date Mar 4, 2003
- International Business Machines Corporation
- Emanuele F. Lopergolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for shorting pin grid array pins for plating
- Patent number 6,497,805
- Issue date Dec 24, 2002
- International Business Machines Corporation
- Arden S. Lake
- G01 - MEASURING TESTING
Information Patent Grant
Multi-level thin-film electronic packaging structure and related me...
- Patent number 6,281,452
- Issue date Aug 28, 2001
- International Business Machines Corporation
- Chandrika Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for shorting pin grid array pins for plating
- Patent number 6,214,180
- Issue date Apr 10, 2001
- International Business Machines Corporation
- Arden S. Lake
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Pin contact mechanism for plating pin grid arrays
- Patent number 6,197,171
- Issue date Mar 6, 2001
- International Business Machines Corporation
- Emanuele F. Lopergolo
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
High performance, low cost multi-chip modle package
- Patent number 5,838,545
- Issue date Nov 17, 1998
- International Business Machines Corporation
- Dennis F. Clocher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density electrical interconnect apparatus and method
- Patent number 5,800,184
- Issue date Sep 1, 1998
- International Business Machines Corporation
- Emanuele Frank Lopergolo
- G01 - MEASURING TESTING
Information Patent Grant
Probe assembly
- Patent number 5,729,148
- Issue date Mar 17, 1998
- International Business Machines Corporation
- Joseph M. Sullivan
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Multichip module having chips on two sides
- Publication number 20040118601
- Publication date Jun 24, 2004
- Ajay Prabhakar Giri
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Multichip module having chips on two sides
- Publication number 20040060732
- Publication date Apr 1, 2004
- International Business Machines Corporation
- Ajay Prabhakar Giri
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD FOR SHORTING PIN GRID ARRAY PINS FOR PLATING
- Publication number 20020125124
- Publication date Sep 12, 2002
- Arden S. Lake
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
Process for forming a multi-level thin-film electronic packaging st...
- Publication number 20010037565
- Publication date Nov 8, 2001
- Chandrika Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for electroplating pins of an integrated circuit package
- Publication number 20010004965
- Publication date Jun 28, 2001
- Emanuele F. Lopergolo
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR

Joseph Michael Sullivan

Person

Patents Grantslast 30 patents

Method of forming a multichip module having chips on two sides

Multichip module having chips on two sides

Process for forming a multi-level thin-film electronic packaging st...

Process for electroplating pins of an integrated circuit package

Method for shorting pin grid array pins for plating

Multi-level thin-film electronic packaging structure and related me...

Method for shorting pin grid array pins for plating

Pin contact mechanism for plating pin grid arrays

High performance, low cost multi-chip modle package

High density electrical interconnect apparatus and method

Probe assembly

Patents Applicationslast 30 patents

Multichip module having chips on two sides

Multichip module having chips on two sides

METHOD FOR SHORTING PIN GRID ARRAY PINS FOR PLATING

Process for forming a multi-level thin-film electronic packaging st...

Process for electroplating pins of an integrated circuit package