Jungtae Kwon

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wordline decoder circuitry
- Patent number 11,404,096
- Issue date Aug 2, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Routing structures for memory applications
- Patent number 10,839,861
- Issue date Nov 17, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Tracking wordline behavior
- Patent number 9,990,972
- Issue date Jun 5, 2018
- ARM Limited
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy schemes for memory cell repair
- Patent number 9,911,510
- Issue date Mar 6, 2018
- ARM Limited
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for reducing disturbance in a semiconductor memory device
- Patent number 9,812,179
- Issue date Nov 7, 2017
- OVONYX MEMORY TECHNOLOGY, LLC
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for providing a semiconductor memory device
- Patent number 9,093,311
- Issue date Jul 28, 2015
- Micron Technology, Inc.
- Michael A. Van Buskirk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and method of operation of such a memory device
- Patent number 8,971,133
- Issue date Mar 3, 2015
- ARM Limited
- Bo Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for reducing disturbance in a semiconductor memory device
- Patent number 8,760,906
- Issue date Jun 24, 2014
- Micron Technology, Inc.
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 8,748,959
- Issue date Jun 10, 2014
- Micron Technology, Inc.
- Michael A. Van Buskirk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for reducing disturbance in a semiconductor memory device
- Patent number 8,699,289
- Issue date Apr 15, 2014
- Micron Technology, Inc.
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for reducing disturbance in a semiconductor device
- Patent number 8,174,881
- Issue date May 8, 2012
- Micron Technology, Inc.
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Degeneration technique for designing memory devices
- Patent number 7,523,420
- Issue date Apr 21, 2009
- ARM Limited
- Hemangi Umakant Gajjewar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repairing integrated circuit memory arrays
- Patent number 7,495,976
- Issue date Feb 24, 2009
- ARM Limited
- Anurag Mittal
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse delay circuit with stable delay
- Patent number 6,353,349
- Issue date Mar 5, 2002
- Integrated Silicon Solution Incorporated
- Jungtae Kwon
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Wordline Decoder Circuitry
- Publication number 20200185014
- Publication date Jun 11, 2020
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Routing Structures for Memory Applications
- Publication number 20190237111
- Publication date Aug 1, 2019
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Tracking Wordline Behavior
- Publication number 20180144780
- Publication date May 24, 2018
- ARM Limited
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATION OF SUCH A MEMORY DEVICE
- Publication number 20150085586
- Publication date Mar 26, 2015
- ARM Limited
- Bo ZHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20140307512
- Publication date Oct 16, 2014
- Micron Technology, Inc.
- Jungtae KWON
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20140291763
- Publication date Oct 2, 2014
- Micron Technology, Inc.
- Michael A. VAN BUSKIRK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20140056090
- Publication date Feb 27, 2014
- Micron Technology, Inc.
- Jungtae KWON
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20120218847
- Publication date Aug 30, 2012
- Micron Technology, Inc.
- Jungtae KWON
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR DEVICE
- Publication number 20110122687
- Publication date May 26, 2011
- Innovative Silicon Isi SA
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20100259964
- Publication date Oct 14, 2010
- Innovative Silicon Isi SA
- Michael A. Van Buskirk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Repairing integrated circuit memory arrays
- Publication number 20080165609
- Publication date Jul 10, 2008
- Anurag Mittal
- G11 - INFORMATION STORAGE
Information Patent Application
Degeneration technique for designing memory devices
- Publication number 20080046856
- Publication date Feb 21, 2008
- ARM Limited
- Hemangi Umakant Gajjewar
- G06 - COMPUTING CALCULATING COUNTING

Jungtae Kwon

Person

Patents Grantslast 30 patents

Wordline decoder circuitry

Routing structures for memory applications

Tracking wordline behavior

Redundancy schemes for memory cell repair

Techniques for reducing disturbance in a semiconductor memory device

Techniques for providing a semiconductor memory device

Memory device and method of operation of such a memory device

Techniques for reducing disturbance in a semiconductor memory device

Semiconductor memory device

Techniques for reducing disturbance in a semiconductor memory device

Techniques for reducing disturbance in a semiconductor device

Degeneration technique for designing memory devices

Repairing integrated circuit memory arrays

Pulse delay circuit with stable delay

Patents Applicationslast 30 patents

Wordline Decoder Circuitry

Routing Structures for Memory Applications

Tracking Wordline Behavior

MEMORY DEVICE AND METHOD OF OPERATION OF SUCH A MEMORY DEVICE

TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE

TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE

TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE

TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE

TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR DEVICE

TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE

Repairing integrated circuit memory arrays

Degeneration technique for designing memory devices