Kalpesh D. Mehta

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Decoder architecture systems, apparatus and methods
- Patent number 8,705,632
- Issue date Apr 22, 2014
- Intel Corporation
- Eric F. Vannerson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Motion estimation sum of all differences (SAD) array having reduced...
- Patent number 8,094,723
- Issue date Jan 10, 2012
- Intel Corporation
- Louis Lippincott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Context buffer address determination using a plurality of modular i...
- Patent number 7,864,864
- Issue date Jan 4, 2011
- Intel Corporation
- Kalpesh D. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Calculating display mode values
- Patent number 7,724,264
- Issue date May 25, 2010
- Intel Corporation
- Kalpesh Mehta
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Image filtering methods and apparatus
- Patent number 7,590,300
- Issue date Sep 15, 2009
- Intel Corporation
- Shashikiran H. Tadas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of access to data from memory
- Patent number 7,549,036
- Issue date Jun 16, 2009
- Intel Corporation
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing block with integrated light weight multi-threading support
- Patent number 7,496,921
- Issue date Feb 24, 2009
- Intel Corporation
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multi-threaded variable length coding
- Patent number 7,457,363
- Issue date Nov 25, 2008
- Intel Corporation
- Suketu R. Partiwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Management of access to data from memory
- Patent number 7,293,155
- Issue date Nov 6, 2007
- Intel Corporation
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing motion estimation using logarithmi...
- Patent number 7,266,151
- Issue date Sep 4, 2007
- Intel Corporation
- Tinku Acharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communication registers for processing elements
- Patent number 7,162,573
- Issue date Jan 9, 2007
- Intel Corporation
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apportioning a shared computer resource
- Patent number 7,155,717
- Issue date Dec 26, 2006
- Intel Corporation
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining if a register is ready to exchange data with a processi...
- Patent number 7,130,986
- Issue date Oct 31, 2006
- Intel Corporation
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable length code table look ups
- Patent number 7,113,115
- Issue date Sep 26, 2006
- Intel Corporation
- Suketu R. Partiwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-sequential access pattern based address generator
- Patent number 7,114,023
- Issue date Sep 26, 2006
- Intel Corporation
- Wen-Shan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Filter mechanism
- Patent number 7,038,688
- Issue date May 2, 2006
- Intel Corporation
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for gathering queue performance data
- Patent number 6,950,887
- Issue date Sep 27, 2005
- Intel Corporation
- James S. Chapple
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating display mode values
- Patent number 6,693,641
- Issue date Feb 17, 2004
- Intel Corporation
- Kalpesh Mehta
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Image processing
- Patent number 6,690,727
- Issue date Feb 10, 2004
- Intel Corporation
- Kalpesh Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus employing associative memories to implement li...
- Patent number 6,597,690
- Issue date Jul 22, 2003
- Intel Corporation
- Kalpesh D. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus employing associative memories to implement me...
- Patent number 6,570,887
- Issue date May 27, 2003
- Intel Corporation
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to introduce programmable delays when replayin...
- Patent number 6,092,142
- Issue date Jul 18, 2000
- Intel Corporation
- Kalpesh Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Management of access to data from memory
- Publication number 20070283122
- Publication date Dec 6, 2007
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable element and hardware accelerator combination for video...
- Publication number 20070153907
- Publication date Jul 5, 2007
- Intel Corporation
- Kalpesh D. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Context buffer address determination using a plurality of modular i...
- Publication number 20060291566
- Publication date Dec 28, 2006
- Kalpesh D. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Communication registers for processing elements
- Publication number 20060294321
- Publication date Dec 28, 2006
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable motion compensation unit
- Publication number 20060291743
- Publication date Dec 28, 2006
- Suketu Partiwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Buffer architecture for data organization
- Publication number 20060230241
- Publication date Oct 12, 2006
- Kalpesh D. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Decoder architecture systems, apparatus and methods
- Publication number 20060222000
- Publication date Oct 5, 2006
- Eric F. Vannerson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Arithmetic circuit
- Publication number 20060064451
- Publication date Mar 23, 2006
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Various methods and apparatuses for motion estimation
- Publication number 20060002472
- Publication date Jan 5, 2006
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variable length code table look ups
- Publication number 20060001555
- Publication date Jan 5, 2006
- Suketu R. Partiwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Motion estimation unit
- Publication number 20060002471
- Publication date Jan 5, 2006
- Louis A. Lippincott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for multi-threaded variable length coding
- Publication number 20060002481
- Publication date Jan 5, 2006
- Suketu R. Partiwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Image filtering methods and apparatus
- Publication number 20050286792
- Publication date Dec 29, 2005
- Shashikiran H. Tadas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for multiprocessor debug support
- Publication number 20050240820
- Publication date Oct 27, 2005
- Eric F. Vannerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Motion estimation sum of all differences (SAD) array having reduced...
- Publication number 20050147168
- Publication date Jul 7, 2005
- Louis Lippincott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Filter mechanism
- Publication number 20050140681
- Publication date Jun 30, 2005
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible high performance error diffusion
- Publication number 20050122545
- Publication date Jun 9, 2005
- Sridharan Ranganathan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Non-sequential access pattern based address generator
- Publication number 20050102587
- Publication date May 12, 2005
- Wen-Shan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing block with integrated light weight multi-threading support
- Publication number 20050066150
- Publication date Mar 24, 2005
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determining if a register is ready to exchange data with a processi...
- Publication number 20040268101
- Publication date Dec 30, 2004
- Kalpesh D. Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communication registers for processing elements
- Publication number 20040268060
- Publication date Dec 30, 2004
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of access to data from memory
- Publication number 20040250042
- Publication date Dec 9, 2004
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Calculating display mode values
- Publication number 20040145582
- Publication date Jul 29, 2004
- Intel Corporation a Delaware corporation
- Kalpesh Mehta
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
Motion estimation using a context adaptive search
- Publication number 20040057626
- Publication date Mar 25, 2004
- Tinku Acharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Motion estimation using logarithmic search
- Publication number 20040047422
- Publication date Mar 11, 2004
- Tinku Acharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Motion estimation
- Publication number 20040042551
- Publication date Mar 4, 2004
- Tinku Acharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for gathering queue performance data
- Publication number 20020172319
- Publication date Nov 21, 2002
- James S. Chapple
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apportioning a shared computer resource
- Publication number 20020143843
- Publication date Oct 3, 2002
- Kalpesh Dhanvantrai Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS EMPLOYING ASSOCIATIVE MEMORIES TO IMPLEMENT ME...
- Publication number 20020085572
- Publication date Jul 4, 2002
- KALPESH D. MEHTA
- G06 - COMPUTING CALCULATING COUNTING

Kalpesh D. Mehta

Person

Patents Grantslast 30 patents

Decoder architecture systems, apparatus and methods

Motion estimation sum of all differences (SAD) array having reduced...

Context buffer address determination using a plurality of modular i...

Calculating display mode values

Image filtering methods and apparatus

Management of access to data from memory

Processing block with integrated light weight multi-threading support

Method and apparatus for multi-threaded variable length coding

Management of access to data from memory

Method and system for performing motion estimation using logarithmi...

Communication registers for processing elements

Apportioning a shared computer resource

Determining if a register is ready to exchange data with a processi...

Variable length code table look ups

Non-sequential access pattern based address generator

Filter mechanism

Method and apparatus for gathering queue performance data

Calculating display mode values

Image processing

Method and apparatus employing associative memories to implement li...

Method and apparatus employing associative memories to implement me...

Method and apparatus to introduce programmable delays when replayin...

Patents Applicationslast 30 patents

Management of access to data from memory

Programmable element and hardware accelerator combination for video...

Context buffer address determination using a plurality of modular i...

Communication registers for processing elements

Configurable motion compensation unit

Buffer architecture for data organization

Decoder architecture systems, apparatus and methods

Arithmetic circuit

Various methods and apparatuses for motion estimation

Variable length code table look ups

Motion estimation unit

Method and apparatus for multi-threaded variable length coding

Image filtering methods and apparatus

Method and apparatus for multiprocessor debug support

Motion estimation sum of all differences (SAD) array having reduced...

Filter mechanism

Flexible high performance error diffusion

Non-sequential access pattern based address generator

Processing block with integrated light weight multi-threading support

Determining if a register is ready to exchange data with a processi...

Communication registers for processing elements

Management of access to data from memory

Calculating display mode values

Motion estimation using a context adaptive search

Motion estimation using logarithmic search

Motion estimation

Method and apparatus for gathering queue performance data

Apportioning a shared computer resource

METHOD AND APPARATUS EMPLOYING ASSOCIATIVE MEMORIES TO IMPLEMENT ME...