Karl Joseph Bois

Person

Ft. Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Double stub transmission line for suppression of harmonics
- Patent number 12,101,875
- Issue date Sep 24, 2024
- Hewlett Packard Enterprise Development LP
- David P. Kopp
- G11 - INFORMATION STORAGE
Information Patent Grant
AC-coupling structure in electrical cabled interconnect
- Patent number 11,810,689
- Issue date Nov 7, 2023
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual slot common mode noise filter
- Patent number 11,309,615
- Issue date Apr 19, 2022
- Hewlett Packard Enterprise Development LP
- David Kopp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and systems for exchange bus routing
- Patent number 11,281,833
- Issue date Mar 22, 2022
- Hewlett Packard Enterprise Development LP
- Melvin K. Benedict
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Printed circuit board signal layer testing
- Patent number 11,191,152
- Issue date Nov 30, 2021
- Hewlett Packard Enterprise Development LP
- Elene Chobanyan
- G01 - MEASURING TESTING
Information Patent Grant
Void avoidance verifications for electronic circuit designs
- Patent number 11,042,683
- Issue date Jun 22, 2021
- Hewlett Packard Enterprise Development LP
- Elene Chobanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication channel with tuning structure
- Patent number 10,771,291
- Issue date Sep 8, 2020
- Hewlett Packard Enterprise Development LP
- Melvin Benedict
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Defected ground structure with void having resistive material along...
- Patent number 10,499,489
- Issue date Dec 3, 2019
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Bit error ratio tests with two-sided bit error ratio frequentist in...
- Patent number 10,491,342
- Issue date Nov 26, 2019
- Hewlett Packard Enterprise Development LP
- Benjamin Toby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Single ended vias with shared voids
- Patent number 10,477,672
- Issue date Nov 12, 2019
- Hewlett Packard Enterprise Development LP
- Melvin K. Benedict
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power proximity verifications for electronic circuit designs
- Patent number 10,445,458
- Issue date Oct 15, 2019
- Hewlett Packard Enterprise Development LP
- Elene Chobanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining parameters of PCB structures
- Patent number 10,372,857
- Issue date Aug 6, 2019
- Hewlett Packard Enterprise Development LP
- Benjamin Toby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Waveguide structures
- Patent number 10,356,964
- Issue date Jul 16, 2019
- Hewlett Packard Enterprise Development LP
- Elene Chobanyan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Defected ground structure to minimize EMI radiation
- Patent number 10,178,761
- Issue date Jan 8, 2019
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Printed circuit board capacitor structures
- Patent number 9,992,860
- Issue date Jun 5, 2018
- Hewlett Packard Enterprise Development LP
- Benjamin Toby
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Symmetry verifications for differential signal vias of an electroni...
- Patent number 9,971,864
- Issue date May 15, 2018
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of hybrid PCB materials in printed circuit boards
- Patent number 9,820,374
- Issue date Nov 14, 2017
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Bit error ratio tests
- Patent number 9,712,263
- Issue date Jul 18, 2017
- Hewlett Packard Enterprise Development LP
- Karl J. Bois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Orthogonal data link, and associated methods
- Patent number 8,363,538
- Issue date Jan 29, 2013
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Printed circuit board substrate and method for constructing same
- Patent number 8,242,380
- Issue date Aug 14, 2012
- Hewlett-Packard Company
- Karl Joseph Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Determination of filter weights
- Patent number 7,746,924
- Issue date Jun 29, 2010
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods of synchronizing reference frequencies
- Patent number 7,721,133
- Issue date May 18, 2010
- Hewlett-Packard Development Company, L.P.
- Robert J Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Printed circuit board substrate and method for constructing same
- Patent number 7,378,598
- Issue date May 27, 2008
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Routing power and ground vias in a substrate
- Patent number 7,327,583
- Issue date Feb 5, 2008
- Hewlett-Packard Development Company, L.P.
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Encoded multi-access bus system and method
- Patent number 7,302,020
- Issue date Nov 27, 2007
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Printed circuit board including pads with vacancies
- Patent number 7,238,892
- Issue date Jul 3, 2007
- Hewlett-Packard Development Company, L.P.
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Computer program product and method of simulating circuits using a...
- Patent number 7,212,960
- Issue date May 1, 2007
- Hewlett-Packard Development Company, L.P.
- David W. Quint
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Passive redundant digital data receiver with dual comparator edge d...
- Patent number 7,136,429
- Issue date Nov 14, 2006
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for determining S-parameters of a connected struc...
- Patent number 7,088,110
- Issue date Aug 8, 2006
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- G01 - MEASURING TESTING
Information Patent Grant
Passive redundant digital data receiver with schmitt-trigger
- Patent number 7,068,734
- Issue date Jun 27, 2006
- Hewlett-Packard Development Company, L.P.
- Karl Joseph Bois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
AC-COUPLING STRUCTURE IN ELECTRICAL CABLED INTERCONNECT
- Publication number 20240055157
- Publication date Feb 15, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Karl J. Bois
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE STUB TRANSMISSION LINE FOR SUPPRESSION OF HARMONICS
- Publication number 20220418093
- Publication date Dec 29, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- David P. Kopp
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR TRANSPOSITION CHANNEL ROUTING
- Publication number 20220139791
- Publication date May 5, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Melvin K. Benedict
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AC-COUPLING STRUCTURE IN ELECTRICAL CABLED INTERCONNECT
- Publication number 20220115166
- Publication date Apr 14, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- KARL J. BOIS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SLOT COMMON MODE NOISE FILTER
- Publication number 20200321672
- Publication date Oct 8, 2020
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- David Kopp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRINTED CIRCUIT BOARD SIGNAL LAYER TESTING
- Publication number 20200236777
- Publication date Jul 23, 2020
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Elene Chobanyan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
COMMUNICATION CHANNEL WITH TUNING STRUCTURE
- Publication number 20190238370
- Publication date Aug 1, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Melvin Benedict
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SINGLE ENDED VIAS WITH SHARED VOIDS
- Publication number 20190239338
- Publication date Aug 1, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Melvin K. Benedict
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEFECTED GROUND STRUCTURE WITH VOID HAVING RESISTIVE MATERIAL ALONG...
- Publication number 20190021164
- Publication date Jan 17, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Karl J. Bois
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER PROXIMITY VERIFICATIONS FOR ELECTRONIC CIRCUIT DESIGNS
- Publication number 20180089358
- Publication date Mar 29, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Elene Chobanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOID AVOIDANCE VERIFICATIONS FOR ELECTRONIC CIRCUIT DESIGNS
- Publication number 20180025106
- Publication date Jan 25, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Elene Chobanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYMMETRY VERIFICATIONS FOR DIFFERENTIAL SIGNAL VIAS OF AN ELECTRONI...
- Publication number 20180025107
- Publication date Jan 25, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAVEGUIDE STRUCTURES
- Publication number 20180026325
- Publication date Jan 25, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Elene Chobanyan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEFECTED GROUND STRUCTURE TO MINIMIZE EMI RADIATION
- Publication number 20170318665
- Publication date Nov 2, 2017
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DETERMINING PARAMETERS OF PCB STRUCTURES
- Publication number 20170308627
- Publication date Oct 26, 2017
- Hewlett Packard Enterprise
- Benjamin Toby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRINTED CIRCUIT BOARD CAPACITOR STRUCTURES
- Publication number 20170311434
- Publication date Oct 26, 2017
- Hewlett Packard Enterprise
- Benjamin Toby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL RETURN PATH
- Publication number 20160336047
- Publication date Nov 17, 2016
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Melvin K BENEDICT
- G11 - INFORMATION STORAGE
Information Patent Application
USE OF HYBRID PCB MATERIALS IN PRINTED CIRCUIT BOARDS
- Publication number 20110157842
- Publication date Jun 30, 2011
- Karl J Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Printed circuit board substrate and method for constructing same
- Publication number 20080196933
- Publication date Aug 21, 2008
- Karl Joseph Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Determination of filter weights
- Publication number 20070263714
- Publication date Nov 15, 2007
- Karl Joseph Bois
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and methods of synchronizing reference frequencies
- Publication number 20070255971
- Publication date Nov 1, 2007
- Robert J. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Printed circuit board including pads with vacancies
- Publication number 20070017693
- Publication date Jan 25, 2007
- Karl J. Bois
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Routing power and ground vias in a substrate
- Publication number 20060055022
- Publication date Mar 16, 2006
- Jerimy Nelson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
System and method for determining signal coupling in a circuit design
- Publication number 20050251769
- Publication date Nov 10, 2005
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for determining signal coupling coefficients for...
- Publication number 20050249479
- Publication date Nov 10, 2005
- Mark D. Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Differential trace pair coupling verification tool
- Publication number 20050246672
- Publication date Nov 3, 2005
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
In-line field sensor
- Publication number 20050246114
- Publication date Nov 3, 2005
- Randy K. Rannow
- G01 - MEASURING TESTING
Information Patent Application
Differential via pair coupling verification tool
- Publication number 20050246670
- Publication date Nov 3, 2005
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for determining worst case coupling within a d...
- Publication number 20050246671
- Publication date Nov 3, 2005
- Karl J. Bois
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for maintaining homogeneity between a model in a...
- Publication number 20050197807
- Publication date Sep 8, 2005
- Jerimy Nelson
- G06 - COMPUTING CALCULATING COUNTING

Karl Joseph Bois

Person

Patents Grantslast 30 patents

Double stub transmission line for suppression of harmonics

AC-coupling structure in electrical cabled interconnect

Dual slot common mode noise filter

Methods and systems for exchange bus routing

Printed circuit board signal layer testing

Void avoidance verifications for electronic circuit designs

Communication channel with tuning structure

Defected ground structure with void having resistive material along...

Bit error ratio tests with two-sided bit error ratio frequentist in...

Single ended vias with shared voids

Power proximity verifications for electronic circuit designs

Determining parameters of PCB structures

Waveguide structures

Defected ground structure to minimize EMI radiation

Printed circuit board capacitor structures

Symmetry verifications for differential signal vias of an electroni...

Use of hybrid PCB materials in printed circuit boards

Bit error ratio tests

Orthogonal data link, and associated methods

Printed circuit board substrate and method for constructing same

Determination of filter weights

Systems and methods of synchronizing reference frequencies

Printed circuit board substrate and method for constructing same

Routing power and ground vias in a substrate

Encoded multi-access bus system and method

Printed circuit board including pads with vacancies

Computer program product and method of simulating circuits using a...

Passive redundant digital data receiver with dual comparator edge d...

System and method for determining S-parameters of a connected struc...

Passive redundant digital data receiver with schmitt-trigger

Patents Applicationslast 30 patents

AC-COUPLING STRUCTURE IN ELECTRICAL CABLED INTERCONNECT

DOUBLE STUB TRANSMISSION LINE FOR SUPPRESSION OF HARMONICS

METHODS AND SYSTEMS FOR TRANSPOSITION CHANNEL ROUTING

AC-COUPLING STRUCTURE IN ELECTRICAL CABLED INTERCONNECT

DUAL SLOT COMMON MODE NOISE FILTER

PRINTED CIRCUIT BOARD SIGNAL LAYER TESTING

COMMUNICATION CHANNEL WITH TUNING STRUCTURE

SINGLE ENDED VIAS WITH SHARED VOIDS

DEFECTED GROUND STRUCTURE WITH VOID HAVING RESISTIVE MATERIAL ALONG...

POWER PROXIMITY VERIFICATIONS FOR ELECTRONIC CIRCUIT DESIGNS

VOID AVOIDANCE VERIFICATIONS FOR ELECTRONIC CIRCUIT DESIGNS

SYMMETRY VERIFICATIONS FOR DIFFERENTIAL SIGNAL VIAS OF AN ELECTRONI...

WAVEGUIDE STRUCTURES

DEFECTED GROUND STRUCTURE TO MINIMIZE EMI RADIATION

DETERMINING PARAMETERS OF PCB STRUCTURES

PRINTED CIRCUIT BOARD CAPACITOR STRUCTURES

SIGNAL RETURN PATH

USE OF HYBRID PCB MATERIALS IN PRINTED CIRCUIT BOARDS

Printed circuit board substrate and method for constructing same

Determination of filter weights

Systems and methods of synchronizing reference frequencies

Printed circuit board including pads with vacancies

Routing power and ground vias in a substrate

System and method for determining signal coupling in a circuit design

System and method for determining signal coupling coefficients for...

Differential trace pair coupling verification tool

In-line field sensor

Differential via pair coupling verification tool

Method and apparatus for determining worst case coupling within a d...

System and method for maintaining homogeneity between a model in a...